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Lab Report: Experiment 8 Series-Parallel R, L, C Circuits

This lab report summarizes experiments on series-parallel R, L, C circuits. Two circuits were analyzed: Circuit 1 with R, L, and C components and Circuit 2 with R and L. Theoretical and experimental values are reported for component values, voltages, currents, and phase angles. Deviations between theory and experiment are also reported. The questions discuss how phase angles change with frequency based on how the capacitive and inductive reactances are affected.

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Mert Ağalday
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104 views

Lab Report: Experiment 8 Series-Parallel R, L, C Circuits

This lab report summarizes experiments on series-parallel R, L, C circuits. Two circuits were analyzed: Circuit 1 with R, L, and C components and Circuit 2 with R and L. Theoretical and experimental values are reported for component values, voltages, currents, and phase angles. Deviations between theory and experiment are also reported. The questions discuss how phase angles change with frequency based on how the capacitive and inductive reactances are affected.

Uploaded by

Mert Ağalday
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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LAB REPORT

CIRCUIT THEORY II

EXPERIMENT 8
Series-Parallel R, L, C Circuits
MERT AALDAY
120403007
EEE202
25.05.2015

DATA TABLES
Circuit 1

XC
XL
R//XL
ZMAGNTUDE
ZT

Theory
-1591,5
628,3
283+450j
1177
-76

Experimental

Deviation

9,2
1056
-53

10,28
30,26

Table 8.1

VLR
VC
IIN

Theory
Magnit
ude

Theor
y

Exp
Mag

Exp
Delay

Exp

4,56
5,44
8,51

133,94
-13,92
-76,05

4,22
5,21
10,23

12us
12us
12us

135
-14,51
-80,45

Deviati
on
Magnit
ude
6,64
2,61
7,06

Deviati
on

0,79
4,07
5,17

Table 8.2

Figure 8.1

Circuit 2

XC
XL
R//XL
ZMAGNTUDE

Theory
-1591.5
628,3
1k+628,319j
0,52

Experimental
2,53
0,84

Deviation

35,71

ZT

-89,9

-76

15,46

Table 8.3

ILR
IC
IIN

Theory
Magnit
ude

Theor
y

Exp
Mag

Exp
Delay

Exp

8,45 mA
6,27 mA
14,72
mA

-32
-90
-89,9

7,44
6,86
14,79

12us
12us
12us

-35
-84
19

Deviati
on
Magnit
ude
12,06
8,16
23,09

Deviati
on

8,57
6,67
121,13

Table 8.4

Figure 8.2

QUESTIONS

1. No it is not necessarily a right angle relationship between circuit


voltage or current in a series-parallel AC circuit. It could be different phase
angles.
2.
Figure 8.1
XC = -1591,5i
8,51 mA

I = 10 / ( (628,3i . 1000/ (1000 + 628,3i)) + (-1591,5i)) =

XL = 628,3i
VL = VR

Vc = 0,00851 . 15915 = 5,44 V

10 5,44 = 4,56 V =

Figure 8.2
XC = -1591,5i
XL = 628,3i
mA

Vc = 10 V 10/(628,3i + 1000) = 8,45 mA = iLR


IC = 10 / 1591,5i = 6,27 mA

Iin = 6,27 + 8,45 = 14,72

3.
Phase angle is increase because of increasing frequency. Because in figure
8.1 if we increase frequency, capacitive reactance will be decreasing. So
phase angle will be increasing.

4.

If frequency decrease, phase angle is decrease. Because if frequency


decrease, capacitive reactance will be increasing. So phase angle is
decrease.

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