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Tutorial - 9

The document discusses the memory requirements and interfacing of an 8086 system. It requires 16KB of SRAM from 02000H and 16KB of ROM from 09000H. It will use 2Kx8bit SRAM chips and 2Kx8bit ROM chips along with 4 74138 decoders to interface the memory. It provides details on drawing the memory interfacing diagram using minimum logic gates.

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100 views15 pages

Tutorial - 9

The document discusses the memory requirements and interfacing of an 8086 system. It requires 16KB of SRAM from 02000H and 16KB of ROM from 09000H. It will use 2Kx8bit SRAM chips and 2Kx8bit ROM chips along with 4 74138 decoders to interface the memory. It provides details on drawing the memory interfacing diagram using minimum logic gates.

Uploaded by

divyarai12345
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Tutorial -9

Module 7

8086 system has the following memory requirements


SRAM:
16KB
From
02000H
ROM:
16 KB
From
09000H

Memory chips to be used are as per following


specification
SRAM- 2K x 8bit
ROM- 2K x 8bit
74138 decoders (4 numbers)
Using these decoders and minimum number of logic
gates draw the memory interfacing diagram

15

14

13

12

11

10

15

14

13

12

11

10

80286-based system has the foll memory req.


576KB of memory
128KB
ROM
rest
RAM
64 K ROM
000000H
64 K ROM
0F0000H
RAM
040000H
System is expandable in nature
Chips available:
27256

4 nos.

61256

14 nos.

Inverter

LS138

4 nos

4-input OR gates

Memory Interface
1 M SRAM 02 00 00 00H
MS621000 128 K x 8
4 Banks 512K

MS62100
Address Lines 17
Data 8
OE
WE
CE1
CE2

Memory Interface
RAM1 02 00 00 00 - 02 07 FF FF
RAM2 - 02 08 00 00 - 02 0F FF FF

RAM Layout 02 00 00 00
02 07 FF FF
A2 A18
WE0
B0

WE1
B1

WE3

WE2
B2

B3

RD
CE1

D0-D7

D8-D15

D16-D23

D24-D31

CE2

A31
A30
A29

GAL22V10C
I10

I/O

I9

I/O

I8

I/O

I7

I/O

I6

I/O

I5

I/O

I4

I/O

I3

I/O

I2

I/O

I1

I/O

I0
CLK

GAL22V10C
WR

I10

I/O

RAM1

A28

I9

I/O

RAM2

A27

I8

I/O

WR0

A26

I7

I/O

WR1

A25

I6

I/O

WR2

A24

I5

I/O

WR3

A23

I4

I/O

BE0

A22

I3

I/O

BE1

A21

I2

I/O

BE2

A20

I1

I/O

BE3

A19

I0
CLK

Program
port (
A28, A27, A26, A25, A24, A23, A22, A21, A20, A19,
BE0, BE1, BE2,BE3,WR: in STD_LOGIC
RAM1, RAM2, WR0,WR1,WR2,WR3 :out STD_LOGIC
);

Program

WR0 <= BE0 OR WR


WR1 <= BE1 OR WR
WR2 <= BE2 OR WR
WR3 <= BE3 OR WR

Program
RAM1 = A29 or A28 or A27 or A26 or Not (A25) or A24
or A23 or A22 or A21 or A20 or A19
RAM2 = A29 or A28 or A27 or A26 or Not (A25) or A24
or A23 or A22 or A21 or A20 or Not (A19)

8086 system has the foll memory requirements:


384K of ROM from 00000H
384K of ROM from A0000H
256K of RAM from 60000H
Chips available:
32K ROM chip
32K RAM chip
LS138

24 nos.
8 nos.
4 nos

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