COMMONWEALTH OF AUSTRALIA
Copyright Regulations 1969
WARNING
This material has been reproduced and communicated to you by or on behalf of Monash University pursuant to
Part VB of the Copyright Act 1968 (the Act).
The material in this communication may be subject to copyright under the Act. Any further reproduction or
communication of this material by you may be the subject of copyright protection under the Act.
Do not remove this notice.
Lecture 8
Mealy and Moore Machines
CSE2303 Formal Methods I
Overview
Moore Machines
Mealy Machines
Sequential Circuits
A Moore Machine
a,b
q1/0
a
q0/1
b
q3/1
a
b
b
q2/0
q0
q1
q2
q3
a
q1
q1
q1
q3
b
q2
q1
q3
q1
OUT
1
0
0
1
Definition of a Moore Machine
A finite set of states
q0, q1, q2, etc.
q0 is the start state
Alphabet of input letters
Alphabet of output letters
Transitions
A unique one for each letter and each state
Output Table
A letter for each state
Moore Machine for aba
q0/0
a
b
q1/0
a
q2/0
b
q4/0
a,b
q3/1
Defining a Language
To change a FA into a Moore machine which
accepts the same language
Name each state
Name the Start state q0
Output 0 in all non-final states
Output 1 in all Final states.
A string is accepted if after it has been
completed read in the last letter printed is 1.
A Mealy Machine
q1
a/1, b/1
a/1
q0
a/0
b/0
q2
b/0
Qold IN Qnew OUT
q0
a
q1
1
q0
b
q2
0
q1
a
q1
1
q1
b
q1
1
q2
a
q1
0
q2
b
q2
0
Definition of a Mealy Machine
A finite set of states
q0, q1, q2, etc.
q0 is the start state
Alphabet of input letters
Alphabet of output letters
Transitions
A unique one for each letter and each state
Each transition also has one output letter
Equivalence of Machines
Every Moore machine can be turned into a
Mealy machine.
Every Mealy machine can be turned into a
Moore machine.
Every regular language can be defined by
Moore machine or a Mealy machine.
All languages defined by a Moore machine or
a Mealy machine are regular.
Sequential Circuits
The output depends on the sequence of past
inputs.
The circuits consist of
a logic gates
i.e. AND, OR, NOT, NAND, NOR
storage elements
i.e. flip-flops, latches.
Clocked Synchronous
Sequential Circuits
Clocked
Means all the flip-flops employ a clock input.
Synchronous
Means all the flip-flops use the same clock
signal.
These circuits only change state when a
triggering edge or tick occurs on the
clock signal.
Logic Gates
A
AND
B
A B AND
0
0 0
0
0 1
0
1 0
1
1 1
A
B
OR
A
0
0
1
1
B
0
1
0
1
OR
0
1
1
1
NOT
A NOT
1
0
0
1
D Flip-Flop
D
Q
CLK
NOT Q
Stores one bit of information
new value of Q = old value of D
Q* = D
Moore Circuit
input
Next State
Logic
Circuit
State
Memory
Output
Logic
Circuit
output
clock input
clock signal
Moore Machine
a,b
q1/0
a
q0/1
b
q3/1
a
b
b
q2/0
q0
q1
q2
q3
a
q1
q1
q1
q3
b
q2
q1
q3
q1
OUT
1
0
0
1
Mealy Circuit
input
Next State
Logic
Circuit
State
Memory
clock input
clock signal
Output
Logic
Circuit
output
Mealy Machine
q1
a/1, b/1
a/1
q0
a/0
b/0
q2
b/0
Q
q0
q0
q1
q1
q2
q2
IN
a
b
a
b
a
b
Q*
q1
q2
q1
q1
q1
q2
OUT
1
0
1
1
0
0
D1
IN
Q1
OR
D2
Q2
Q2
AND
OR
clock signal
D1 = IN
D2 = IN OR ((Q1 AND Q2) OR (NOT Q2))
OUT = Q1 AND Q2
Q1* = D1
Q2* = D2
OUT
Q1
0
0
0
0
1
1
1
1
Q2
0
0
1
1
0
0
1
1
IN
0
1
0
1
0
1
0
1
Q 1*
0
1
0
1
0
1
0
1
Q 2*
1
1
0
1
1
1
1
1
OUT
0
0
0
0
0
0
1
1
D1 = IN
D2 = IN OR ((Q1 AND Q2) OR (NOT Q2))
OUT = Q1 AND Q2
Q1 * = D 1
Q2 * = D 2
Q
q0
q0
q1
q1
q2
q2
q3
q3
Q1
0
0
0
0
1
1
1
1
Q2
0
0
1
1
0
0
1
1
IN
0
1
0
1
0
1
0
1
q0
q1
q2
q3
Q*
q1
q3
q0
q3
q1
q3
q1
q3
Q1
0
0
1
1
Q 1*
0
1
0
1
0
1
0
1
Q2
0
1
0
1
Q 2*
1
1
0
1
1
1
1
1
OUT
0
0
0
0
0
0
1
1
Q
q0
q0
q1
q1
q2
q2
q3
q3
IN
0
1
0
1
0
1
0
1
Q*
q1
q3
q0
q3
q1
q3
q1
q3
OUT
0
0
0
0
0
0
1
1
1/1
q3
1/0
1/0
q0
0/0
1/0
0/1
q2
0/0
0/0
q1
Exercise
Find the corresponding sequential circuit
for the following Mealy Machine.
q1
0/1, 1/1
0/1
q0
0/0
1/0
q2
1/0
Q
q0
q0
q1
q1
q2
q2
IN
0
1
0
1
0
1
Q*
q1
q2
q1
q1
q1
q2
q1
OUT
1
0
1
1
0
0
0/1, 1/1
0/1
q0
0/0
1/0
q2
1/0
Choose an
unique binary
code for each
state.
q0
q
1
q2
A
0
0
1
B
0
1
0
Q
q0
q0
q1
q1
q2
q2
A
0
0
0
0
1
1
B
0
0
1
1
0
0
Q*
q1
q2
q1
q1
q1
q2
IN
0
1
0
1
0
1
q1
A*
0
1
0
0
0
1
0/1, 1/1
0/1
q0
0/0
1/0
q2
B*
1
0
1
1
1
0
1/0
OUT
1
0
1
1
0
0
Choose an
unique binary
code for each
state.
q0
q
1
q2
A
0
0
1
B
0
1
0
A
0
0
0
0
1
1
B
0
0
1
1
0
0
IN
0
1
0
1
0
1
A*
0
1
0
0
0
1
B*
1
0
1
1
1
0
OUT
1
0
1
1
0
0
A* = (A B IN ) (A B IN )
B* = (A B IN ) (A B IN )
OUT = (A B IN ) (A B IN )
(A B IN )
A
0
0
0
0
1
1
B
0
0
1
1
0
0
IN
0
1
0
1
0
1
A*
0
1
0
0
0
1
B*
1
0
1
1
1
0
OUT
1
0
1
1
0
0
A* = IN (B )
B* = A*
OUT = (A ) (IN B )
A*
IN
AND
NOT
Delay
NOT
B*
Delay
NOT
NOT
OR
A* = IN (B )
B* = A*
OUT = (A ) (IN B )
AND
OUT
Revision
Know what the following machines are and
how to use them.
Moore Machine
Mealy Machine
Be able to find the equations for a sequential
circuit corresponding to a Mealy machine.
Read
Preparation
Chapters 12 of the Text Book
