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High Power Project 5

This document describes a circuit schematic and analysis of a gate controlled series capacitor (GCSC). The circuit schematic of the GCSC is presented. Equations are derived for the amplitude of the kth harmonic of the capacitor voltage. These equations show the capacitor voltage is not sinusoidal and expressions are obtained for the kth harmonic. Finally, fast Fourier transform (FFT) analysis of the circuit is proposed to analyze the waveform shapes.

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78 views12 pages

High Power Project 5

This document describes a circuit schematic and analysis of a gate controlled series capacitor (GCSC). The circuit schematic of the GCSC is presented. Equations are derived for the amplitude of the kth harmonic of the capacitor voltage. These equations show the capacitor voltage is not sinusoidal and expressions are obtained for the kth harmonic. Finally, fast Fourier transform (FFT) analysis of the circuit is proposed to analyze the waveform shapes.

Uploaded by

ahmedrizwanchamp
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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EEC 693/793: High Power Electronics

Project V
Gate controlled Series Capacitor-(GCSC)

Circuit Schematic of GCSC :

(b)To derive the mathematical expression for the amplitude of the kth harmonic of the
capacitor voltage and its value for 5 harmonics:
We know that the line and the capacitor currents which are identical are given by
I(t) = icos(wt)---------------------------------------------------------------------------------------------------------(1)
by ohms law the voltage across the capacitor
isin (wt )
wc

V(t) =

----------------------------------------------------------------------------------------------------- (2)

Assume now the GTO-1 has been on and it is turned off at wt = (while GTO-2 is till off)
Then the capacitor currents which are identical are given by
i c ( t )=i cos ( wt )=c

d v c (t )
dt

----------------------------------------------------------------------------(3)

wt

i
v c ( t ) = cos ( wt )dwt
wc

i
(sinwt sin )
wc

Since the capacitor voltage will not be sinusoidal the peak value at the fundamental frequency is

v 1 c ( t )=

4
v ( t ) sin ( wt ) dwt
0 c

( wt )sin
sin sin ( wt )

v 1 c ( t )=

4I

wc

From these the expression for the kth harmonic is given by:
( wt )sin
sin sin ( kwt )

v kc ( t )=

-------------------------------------------------------

(4)

4I

wc

( wt ) sin ( kwt )sin sin ( kwt )


sin

4I

wc

If we multiply and divide the above expression by 2 we get


( wt ) sin ( kwt )sin sin ( kwt )
sin

1
2.
2
=

4 Xc

2sinAsinB = cos(A-B)-cos(A+B)

k1
( wtcos ( k +1) wt ) sin sin

( kwt )

cos

4 I Xc

sin ( k1)
wt
k1

4 I Xc 1

sin ( k +1 ) sin ( k +1 )
4 I Xc 1 sin ( k1 ) sin ( k 1 )

2
k 1 2
k 1
k +1 2
k +1

sin ( k +1 )
wt
k +1

-sin

1
( (coskwt )2 )
k

)(

sin ( k +1 ) sin ( k + 1 )
4 I Xc 1 sin ( k1 ) sin ( k 1 )

+
2
2
k 1 2
k 1
k +1 2
k +1

Now

sin ( k1 )
k 1 2

and

sin ( k +1 )
k
cancel out cos
is zero
k +1 2
2

So the expression modifies to


=

sin ( k +1 )
4 I Xc 1 sin ( k 1 )
2 sin cosk
+

2
k1
k +1
k

-sin

sin cos
k

(cos

k
2

k
+cosk )
2
k

2sin cosk
k

Upon taking the L.C.M we get


=

4 I Xc 1 ( k 1 ) sin ( k +1 ) ( k +1 ) sin ( k 1 ) 2sin cosk


(

)
2
k
( k +1 ) ( k 1 )

4 I Xc 1 k sin ( k+ 1 ) sin ( k +1 ) k sin ( k 1 )sin ( k 1 ) 2 sin cosk


(

)
2
k
( k +1 )( k1 )

( k 1 )
sin ( k +1 ) sin [ sin ( k1 ) +sin ( k +1 ) ]
k

4 I Xc 1

sin(A+B)+sin(A-B)=2sinAcosB
sin(A+B)-sin(A-B)=2cosAsinB

4 I Xc 1 k (2 cosk sin )2 sinkcos 2sin cosk


(
+
)
2
( k +1 ) ( k1 )
k

2 is taken common and cancelled out

4 I Xc kcosk sin sinkcos sin cosk


(

k
( k +1 ) ( k 1 )

4 I Xc

4 I Xc

4 I Xc

k 2 cok sin ksinkcos + ( k 2 1 ) sin cosk


2
k (k 1)

k cok sin ksinkcosk scosk + sincosk


2
k (k 1)

sincoskksinkcos
k (k 21)

(c) FFT Analysis :

**** 05/05/15 15:35:23 ****** PSpice Lite (October 2012) ****** ID# 10813 ****
** Profile: "SCHEMATIC1-gcsc" [ C:\Users\Shaik Rizwan Ahmed\Downloads\SONY VAIO Driver\1\projectaPSpiceFiles\SCHEMATIC1\gcsc.sim ]

****

CIRCUIT DESCRIPTION

******************************************************************************

** Creating circuit file "gcsc.cir"


** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT
SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of C:\SPB_Data\cdssetup\OrCAD_PSpice/16.6.0/PSpice.ini file:
.lib "nomd.lib"
*Analysis directives:
.TRAN 0 200m 0 0.001
.OPTIONS ADVCONV
.PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"

**** INCLUDING SCHEMATIC1.net ****


* source PROJECTA
R_R2
0 N16535 1k TC=0,0
X_S1 N03919 0 N00440 N00412 SCHEMATIC1_S1
X_S2 N03826 0 N00412 N00440 SCHEMATIC1_S2
V_V2
N03826 0
+PULSE 0 1 0 1u 1u 0.00729167 0.0166666667
V_V3
N03919 0
+PULSE 0 1 0.00839 1u 1u 0.00729167 0.0166666667
V_V4
N16472 0 AC 0
+SIN 0 0.5 60 0 0 98

R_R4
C_C1

N00412 N16472 1k TC=0,0


N00440 N16535 7.5u TC=0,0

.subckt SCHEMATIC1_S1 1 2 3 4
S_S1
3 4 1 2 Sbreak
RS_S1
1 2 1G
.ends SCHEMATIC1_S1
.subckt SCHEMATIC1_S2 1 2 3 4
S_S2
3 4 1 2 Sbreak
RS_S2
1 2 1G
.ends SCHEMATIC1_S2
**** RESUMING gcsc.cir ****
.END

**** 05/05/15 15:35:23 ****** PSpice Lite (October 2012) ****** ID# 10813 ****
** Profile: "SCHEMATIC1-gcsc" [ C:\Users\Shaik Rizwan Ahmed\Downloads\SONY VAIO Driver\1\projectaPSpiceFiles\SCHEMATIC1\gcsc.sim ]

****

Voltage Controlled Switch MODEL PARAMETERS

******************************************************************************

Sbreak
RON 1
ROFF 1.000000E+06
VON 1
VOFF 0

**** 05/05/15 15:35:23 ****** PSpice Lite (October 2012) ****** ID# 10813 ****
** Profile: "SCHEMATIC1-gcsc" [ C:\Users\Shaik Rizwan Ahmed\Downloads\SONY VAIO Driver\1\projectaPSpiceFiles\SCHEMATIC1\gcsc.sim ]

****

INITIAL TRANSIENT SOLUTION

TEMPERATURE = 27.000 DEG C

******************************************************************************

NODE VOLTAGE

NODE VOLTAGE

NODE VOLTAGE

(N00412)

.4951 (N00440)

.4951 (N03826)

(N16472)

.4951 (N16535)

0.0000

0.0000 (N03919)

VOLTAGE SOURCE CURRENTS


NAME
CURRENT
V_V2
V_V3
V_V4

0.000E+00
0.000E+00
1.084E-19

TOTAL POWER DISSIPATION -5.37E-20 WATTS

JOB CONCLUDED

NODE VOLTAGE

0.0000

**** 05/05/15 15:35:23 ****** PSpice Lite (October 2012) ****** ID# 10813 ****
** Profile: "SCHEMATIC1-gcsc" [ C:\Users\Shaik Rizwan Ahmed\Downloads\SONY VAIO Driver\1\projectaPSpiceFiles\SCHEMATIC1\gcsc.sim ]

****

JOB STATISTICS SUMMARY

******************************************************************************

Total job time (using Solver 1) =

.11

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