Summer Term End Examination - July 2013
Summer Term End Examination - July 2013
Class NBR
Course Code
Course Title
: 1674
: EEE103
: Electronics
1.
Slot : A
Max.Marks:100
PART - A (8 X 5 = 40 Marks)
Answer ALL Questions
With neat diagram explain the following filters
(i) Capacitor Filter
(ii) Inductor Filter
(iii) LC Filter
(iv) CLC Filter
(v) RC Filter
2.
For the Zener diode network of given figure, determine the range of RL, IL, that will result
in VRL being maintained at 10 V.
3.
Sketch neatly the circuit diagram of a CB configuration transistor, discuss its operation,
characteristics and compare it with the other modes of operation.
4.
a) A JFET has the following parameters IDSS = 9 mA, Vp= -3.5 Volts, VGS = -5 Volts. Find
[3]
6.
7.
[2]
V2=140V.The amplifier has a differential gain of Ad=4000 and the value of CMRR is
100.
8.
Design an integrator circuit using OP-Amp and derive the output expression of the
Integrator.
Page 1 of 3
PART B (6 X 10 = 60 Marks)
Answer any SIX Questions
9.
[10]
11.
[5]
[5]
Determine the levels of ICQ and VCEQ for the voltage-divider configuration of the figure
[10]
given below using the exact and approximate techniques and compare the solutions.
12.
[10]
(a) VGSQ.
(b) IDQ
(c) VDS
(d) VD
(e) VG
(f) Vs
Given: IDSS= 10mA ,Vp= - 8V
Page 2 of 3
13.
Explain and sketch an n-channel depletion-type MOSFET with the proper biasing. Sketch
[10]
15.
[5]
[5]
a) Draw the inverting and non-inverting configuration of OP-Amplifier and Derive the
[5]
b) Calculate the output voltage of an op-amp summing amplifier for the following set of
[5]
16.
[5]
[5]
Page 3 of 3