Fundamentals of Digital Logic andhficrocomputer Design. M.

Rafiquzzaman
Copyright 02005 John Wiley & Sons, Inc.

APPENDIX

8086 INSTRUCTION SET

REFERENCE DATA
AAA (nooperands)
ASCII adjust for addition

AAA
Operands

IClocks

(no operands)

Operands

Clocks

I
I

I
I

AAM

AAS (no operands)

ASCII adjust for subtraction

Operands

Codina Example

Clocks

Transfers'

Bytes

xxuxu

O D I T S Z A P C
U
xxuxu

AAD

O D I T S Z A P C

Codlng Example

I Clocks I Transfers' I Bytes I

1 8 3

1 AAS

Bytes

AAM (nooperands)
ASCII adjust for rnultiDlv
. _

Operands

Coding Example

Flags

O D I T S Z A P C
U
uuxux

AAA

Transfers'

60

I AAM

(nooperands)

AAD (no operands)

ASCII adjust for division

(no operands)

(nooperands)

I Transfers' I Bytes I

AAD

Flags

Flags E D I T S Z A P C

uuxux

Codlng Example
AAS

677

Fundamentals of Digital Logic and Microcomputer Design

678

ADC destination,source
Add with carry

ADC

Flags

Operands

17+ A
4

Flags

Operands

CALL
Operands
near-proc
far-proc
memptr 16
regptr 16
memptr 32

Clocks

9+EA
16+EA
4
17+EA
4

O D I T S Z A P C

Transfers'

1
2

Bytes
2
2-4
24
3-4
36
2-3

AND
AND
AND
AND
AND
AND

CALL target
Cali a orocedure

AL,BL
CX,FLAG-WORD
ASCII [DIJ,AL
CX,OFOH
BETA,OlH
AX, 010100008

Flags

Bytes

O D I T S Z A P C

Coding Examples
CALL NEAR-PROC

21 + EA
16
37+EA

CBW

CALL PROC-TABLE [Si]

CALL AX

CBW (no operands)

Convert byte to word
Operands

(no operands)

3-6
2-3

AND destination,source
Logical and

register, register
register, memory
memory, register
1 register, immediate
1 memory, immediate
accumulator, immediate

CX, DX
DI, [BX].ALPHA
TEMP,CL
CL,2
ALPHA, 2
ADD AX, 200

3-4

17+ A
4

Operands

x x x x x

ADD
ADD
ADD
ADD
ADD

16+ A

AND

O D I T S Z A P C

Coding Example

register, register
register, memory
memory, register
register, immediate
memory, immediate
accumulator, immediate

'

-I

ADC DX. BETA [SI]

ADC ALPHA [EX] [Sl], DI

16+EA

ADD destination.source
Addition

ADD

xxxxx

Coding Example

Bytes

register, memory
memory, register
register, immediate
memory, immediate
accumulator. immediate

O D I T S Z A P C

Clocks

Flags
Trrnrfers'

Bytes
1

O D I T S Z A P C

Coding Example
CBW

Appendix F: 8086 Instruction Set Reference Data

679

CLC (no operands)

Clear carry flag

CLC
Operands
(no operands)

ICLD

Flags

Clocks

Transfers'

Bytes

Coding Example

Operands

Clocks

O D I T S Z A P C
Transfers'

Bytes
1

CLI (nooperands)
Clear interrupt flag

c LI
Operrnds
(no operands)

Clocks

Flags
Transfers.

Bytes
1

CMC (no operands)

Complement carry flag

CMC
Operands
(no operands)

Transfers'

CMP destlnation,source

CMP
Operands

Clocks

Transfers'

1
-

9+EA
9+EA
4
10+EA

1
1

CMPS dest-strlng,source-string
Compare string
Operand8
dest-string, source-strlng

2-4
3-4

3-6
2-3

CMC
O D I T S Z A P C

xxxxx

Coding Example

Bytes

2
2-4

O D I T S Z A P C

Coding Example

Flags

Compare destination to source

register, register
reglster, memory
memory, register
register, lmmedlate
memory, immedlate
accumulator, immediate

Coding Example

Bytes
1

O D I T S Z A P C

CLI

Flags

-2
Clocks

CLC

CLD (no operands)

Clear direction flag

(no operands)

O D I T S Z A P C

CMP
CMP
CMP
CMP
CMP

BX,CX
DH.ALPHA
[BP+2).Si
BL,O2H
[6X].RADAR [Dl], 3420H
CMP AL, 0001WOOB
Flags

O D l T S Z A P C

xxxxx

Codlng Example
CMPS EUFF1, BUFF2
REPECMPS ID, KEY

~ F o r t h a ~ . . d d f o u r c l o c k a f o r e u h i b b i t word tranaferwilh~noddaddr~rs
F o r l h ~ ~ . a d d f o u r c I o c k ~ f o r ~ a c h 1word
6 4 i tranaler
t

II
I

Fundamentals of Digital Logic and Microcomputer Design

680

CWD (nooperands)
Convert word to doubleword

CWD
Operands

Clocks

(no operands)

Transfers'

Bytes

Coding Example

CWD

DAA (nooperands)
Decimal adjust for addition

DAA

Clocks

Operands

(no operands)

Flags

I Transfers' I Bytes
-

Flags

O D I T S Z A P C

xxxxx

Codlng Example

(no operands)

DAS

DEC
Operands

reg16

DEC destination
Decrement by 1

Flags

15+EA

Operands

Clocks
80-90
144-162
(86-96)
+ EA
(150-168)
+A

reg8
reg16
mem8
meml6

I
I

Operands

immediate, memory
immediate, register

x x x x

2-4

Transfers'

I
O D I T S Z A P C

uuuuu

Bytes

2-4

DIV BX

DIV ALPHA
DIV TABLE [Sl]

ESC external-opcode,source
EscaDe
Clocks

Transfers'

Bytes

8+EA
2

2-4
2

DiV CL

2
2-4

DEC AX
DEC AL
DEC ARRAY [Sl]

Flags

IESC

O D I T S Z A P C

Coding Example

memory

xxxxx

DAA

Operands

O D I T S Z A P C

Codlng Example

DAS (no operands)

Decimal adjust for subtraction

O D I T S Z A P C

Flags

Flags

O D I T S Z A P C

I
Codlng Example

ESC 6,ARRAY [Sl]

ESC 20,AL

I
I
I
I
'FortheB086,addfourelocks(oreach 16-bil word Iranllferwllh~noddaddre?ls.FortheB088. add lourclocksforesch16-b1lwordtransfer

Appendix F: 8086 Instruction Set Reference Data

IHLT

1
I

Operandr

68 1

HLT (no operands)

Halt

Clocks

Tranders'

(no operands)

Operands

Clocks

uuuuu

Transfers'

Bytes

2
2
2-4

IDlV EL
iDlV CX
IDiV DIVISOR-BYTE [Sl]

2-4

IDlV [BX).DIVISOR-WORD

+ EA
(171-190)
+ EA

meml6

IMUL source
integer multiplication

Operands

Bytes

Coding Example

1281

reg16

Flags

O D I T S Z A P C

uuuux

Codlng Example

IMUL RATE-BYTE

(88-104)

+ EA

(134-160)

meml6

IN accumulator,port
Input byte or word

Operands

accumulator, immed8
accumulator, DX

I Clocks I

Transfers'

I Bytes I

10
8

1
1

2
1

INC destlnation
Increment by 1

INC
Operandr
reg16
reg8
memory

HLT

O D I T S Z A P C

101-112
185-184
(107-118)

reg8
reg18
mem8

O D I T S Z A P C

Coding Example

Bytes

I O N source
Integer dlvision

IDlV

Flags

Clocks
2

3
15+ EA

Flags

Coding Example
IN AL,OFFEAH
IN AX,DX

Flags
Transfers'

Bytes

1
2
2-4

O D I T S Z A P C

O D I T S Z A P C

xxxx

Codlng Example
INC CX
INC BL
INC ALPHA [Dl] [EX]

II

Fundamentals of Digital Logic and Microcomputer Design

682

INT interrupt-type
Interrupt

INT

I Clocks I Transters' I Bytes I

Operands

52
51

immed8 (type = 3)
immed8 (type # 3)

I
I

Operands

1
2

Clocks

Transfers.

Bytes

61

NIA

Transfers.

Bytes

00

Clocks
53 or 4

(no operands)

INT 67
O D I T S Z A P C
00

Flags

Coding Example

Coding Example
INTO

I Clocks Transfers' Bytes

I 24 I 3 I 1 1 IRET

Operands

JA/JNBE short-label
Jump if abovelJump if not below nor equal

JA/JNBE

O D I T S Z A P C
R RRRR RR R R
Coding Example

Flags

O D I T S Z A P C

I Clocks 1 Transfers' 1 Bytes I

Coding Example
I 16or4 1 - I 2 I JA ABOVE

Operands
short-label

JAE/JNB short-label
Jump if above orequallJump if not below

JAE/ J N8
Operands
short-label

J B/J NAE

Clocks

Transters'

Bytes

16 or 4

JBIJNAE short-label
Jump if belowlJumpif notabove nor equal
Operands

short-label

NIA

IRET (no operands)

Interrupt Return

IRET

Codlng Example

INT 3

INTO (no operands)

InterruDt ifoverflow

Operands

(nooperands)

5
5

INTR (external maskable interrupt)

Interrupt i f INTR and I F 4

(no operands)

I INTO

O D I T S Z A P C
Flags

Clocks
16 or 4

Transters'

Bytes
2

Flags

O D I T S Z A P C

Coding Example
JAE ABOVE-EQUAL
O D I T S Z A P C
Coding Example
JB BELOW

Appendix F: 8086 Instruction Set Reference Data

JBE/JNA short-label
Jump if below or equallJump i f not above

JBE/JNA

Operands

Bytes

Codlng Example

JC CARRY-SET

JCXZ short-label
Jump if CX is zero
Operands

Transfers'

18or8

JE/JZ short-label
Jump If equallJump i f zero

JE/JZ
Operands
short-label

1 JWJNLE

Bytes

Coding Example

JCXZ COUNT-DONE

short-label

Clocks

Translers'

Bytes

16or4

Clocks
16or4

IJGEIJNL

Transfers'

Codlng Example

I Bytes I
2

J Q E N N L shot?-label
JurnoIfareateroreauallJumo
i f not less
,
"

Operands
short-label

IJLIJNGE

I
I

ODermdS

O D I T S Z A P C

Flags

JG/JNLE short-label
JUmD
i f not less nor eaualI
. i f QreaterlJumo
-

Operands

O D I T S Z A P C

Flags

Clocks

short-label

I short-label

transfers.

10or4

JCXZ

O D I T S Z A P C

Flags

Clocks

short-label

Coding Example

JC short-label
Jump i f carry

JC

O D I T S Z A P C

Flags

I Clocks I Translers* [ Bytes

Operands

683

JZ ZERO
Flags O D I T S Z A P C
Codlna ExamDle
JG GREATER
0 0 1 T S Z A P C

Clocks

Transfers.

Bytes

18or4

Coding Example

JGE GREATER-EQUAL

J U J N Q E short-label
JumD
If IesslJumo
.~ i f noloreater nor eaua
'
I
I

Flags

O D I T S Z A P C

i Clocks I Transfers* I Bytes i

Coding Example
I 16or4 1 - I 2 I JL LESS

'Forlhe W86, a ~ d f o u r c l o c k s f o r e s c h l ~ b i t w o1rrd~ n r t ~ r u i t h r n ~ d d . d d r ~Fa~ar. t h . ~ , . d d b u r c i ~ k S f o r ~16bil

~ c hword lranaler

i
I

Fundamentals of Digital Logic and Microcomputer Design

684

IJLEIJNG
t

I
1

JLE/JNG short-label
Jump' if less or eQual/JUmD if not areater

Operands

Clocks

short-label

Transfers*

IJMP
Operands

O D I T S Z A P C

JNG NOT-GREATER

Flags

O D I T S Z A P C

~~

short-label
near-label
far-label
memptrl6
regptrl6
memptr32

Transfers'

Bytes

1 8 t EA
24 t A '

2
2-4

Coding Example
JMP
JMP
JMP
JMP
JMP
JMP

3
5
2-4

Coding Example

JMP target
Jump

I Clocks

Flags

Bytes

16 or 4

SHORT
WITHIN-SEGMENT
FAR-LABEL
[BX).TARGET
CX
0THER.SEG [Sl]

JNC short-label
Jump if not carry

JNC
Operands
short-label

Clocks

Transfers'

Bytes

16 Or 4

Coding Example

I
9

Operands
short-label

Flags

JNO short-label
Jumo
if not overflow
'
Clocks
16or4

I Transfers' I Bytes
1 - I 2

JNP/JPO short-label
Jump i f not paritylJump if parity odd

JNP/JPO
Operands
short-label

Clock8
16 or 4

Transfers'

Bytes

Operands

Clocks

I 16or4 I

Flags

Codlng Example

Bytes
2

O D I T S Z A P C

Coding Example
JPO ODD-PARITY

Flags
Tran8fer8'

O D I T S Z A P C

JNO NO-OVERFLOW

Flags

JNS short-label
Jump If not sign

JNS

O D I T S Z A P C

I Clocks [ Transfers' I Bytes I

Coding Example
I 16or4 I - I 2 I JNE NOTLEQUAL

Operand8
short-label

IJNO

O D I T S Z A P C

JNC NOTLCARRY

JNEIJNZ short-label
Jump if not equailJump if not zero

JNE/JNZ

short-label

Flags

O D I T S Z A P C

Coding Example
JNS POSITIVE

'For lhe KIM add lour Clock8 lor each lbblt word Iransfer with an odd lddrass For the W38,add four clockslor eacn lbbit word trinsler
~~

Appendix F: 8086 Instruction Set Reference Data

IJO

JO short-label
Jumo i f overflow
Clocks

1 Clocks

Operands

I 1 6 ~ 41

short-label

Transfers'

I
I

Operands

Flags O D I T S Z A P C
Bytes

Codlng Example

1 JPE EVEN-PARITY

I
I

LAHF (no operands)

Load AH from flaos
Clocks

(no operands)

Transfers'

Operands
regl6, mem32

Flags

Clocks

Transfers

Bytes

16+EA

2-4

ILES

I
Omrands

reg16, mem32
~

O D I T S Z A P C

Coding Example

O D I T S Z A P C

Coding Example
LEA BX,(BP][DI)

2-4

LES destination,source
Load oointer usina ES
1 -

O D I T S Z A P C

LDS SI,DATA.SEG [Ol]

Flags

2+EA

Flags

LAHF

I Clocks 1 Transfers' 1 Bytes I

Operands

regl6, meml6
I

O D I T S Z A P C

Coding Example

LEA destination.source
Load effective address

LEA

Flags

Bytes

LDS destination,source
Load pointer using DS

LDS

JO SIGNED-OVRFLW

I Clocks 1 Transfers' I Bytes I

Coding Example
1160r4 I
- I 2 I JS NEGATIVE

short-label

~LAHF

O D I T S Z A P C

Coding Example

JS short-label
Jumo if sian

Operands

Flags

Bytes

JP/JPE short-label
Jump if paritylJump if parity even

JP/JPE

Transfers'

16or4

short-label

I
Operands

IJS

685

Flags

O D I T S Z A P C

I Clocks I

Transfers'

I Bvtes I

16+EA

2-4

Coding ExemDle
LES DI, (BX].TEXT-BUFF

'For the 8086 add four Clocksfof each lEblt word transfer wlth an odd address For the W ,
add four clocks for each 16bil word tranllW

.
I

686

Fundamentals of Digital Logic and Microcomputer Design

ILOCK
1

I
I

Operands

Clocks

Transfers'

Load strino

source-string
(repeat) source-string

I LOOP

Clocks

Transfers'

Bytes

12
9+13/rep

llrep

LOOP short-label
LOOP

Operands

Clocks

Transfers'

Bytes

1715

1 LO&PE/LOOPZ I
Operands

Clocks

1 Clocks I Tranrfers'
I

NMI~

Operands
(nooperands)

O D I T S Z A P C

Coding Example

19or5

Flags

LOOPE AGAIN

Flags

Bytes
2

Transfers'

Bytas

50'

NIA

O D I T S Z A P C

Coding Example

LOOPNE AGAIN

NMI (external nonmaskable interrupt)

lnterruot it NMI = 1

Clocks

O D I T S Z A P C

Coding Example

[
I

LOOP AGAIN

LOOPNE/LOOPNZ short-label
Loop if not equallLoop if not zero

Operands

LODS CUSTOMER-NAME
REP LODSNAME

Bytes

Transfers'

18or6

short-label

short-label

O D I T S Z A P C

Coding Example

LOOPE/LOOPZ short-label
Loop if equal I Loop if zero

LOO PNE/LOOPNZ

Flags

short-label

Coding Example

LODS source-string

O D I T S Z A P C

LOCK XCHGFLAG.AL

I
Operands

Flags

Bytes

(no operands)

1 LODS

LOCK (no operands)

Lock bus

O S I T S Z A P C

Coding Example
NIA

Appendix F: 8086 Instruction Set Reference Data

MOV

Flags O D I T S Z A P C

MOV destinatlon,source
Move

ODerandS

Clocks

687

Transfers;'

I Bytes

Codino Examole
~~

memory, accumulator
accumulator, memory
register, register
register, memory
memory, register
register, immediate
memory, immediate
seg-reg, reg16
seg-reg, meml6
regl6, seg-reg
memory, seg-reg

1 MOVS
1

MOVS dest-string,source-string
Move string

Operands

MOVSB/MOVSW

Clocks

Transfers'

9+17/rep

(repeat) (no operands)

Transfers'

Bytes

18
9+17lrep

2
2lrep

Clocks

reg8
reg16
mem0

70-77

meml6

(124-1 39)

Transfers'

Flags

Bytes

O D I T S Z A P C

CodlngExample
MOVS LINE EDIT-DATA
REP MOVS SCREEN, BUFFER
O D I T S Z A P C

Coding Example
MOVSB
REP MOVSW

Flags

MOV ARRAY [Sl], AL

MOV AX, TEMP-RESULT
MOV AX.CX
MOV BP, STACK-TOP
MOV COUNT [Dl]. CX
MOV C L , 2
MOV MASK [BX] [Sl],2CH
MOV ES,CX
MOV DS, SEGMENT-BASE
MOV BP,SS
MOV [BXlSEG-SAVE, CS

Flags

Clocks

MUL source
Multipllcation, unsigned
Operands

I Bytes I

MOVSB/MOVSW (no operands)

Move string (bytelword)

Operands

MUL

2
2lrep

18

dest-string, source-string
(repeat) dest-string, source-string

3
3
2
2-4
2-4
233-6
2
2-4
2
2-4

10
10
2
8+ EA
9+EA
4
10+ EA
2
8+EA
2
9+EA

O D I T S Z A P C

uuuux

Coding Example

MUL MONTH [Sl]

MUL BAUD-RATE

'For the W ,
add four clocks for each lbbit word transler with an odd address. For the8OOl. add lour clocks for each 16bil word IIanSler

II

Fundamentals of Digital Logic and Microcomputer Design

688

NEQ destination

NEG

Negate

Operands

register
memory

Clocks

Transfers'

Bytes

3
16+EA

2
2-4

Operands

Transfers'

Bytes

NOT destination

NOT
Operands

Clocks

Transfers'

Bytes

2
2-4

3
16tEA

OR destination,source
Logical inclusive or

OR
Operands

register, register
register, memory
memory, register
accumulator, immediate
register. immediate
memory, immediate

Clocks

Transfers'

Bytes

1
2

2
2-4
2-4
2-3

3-6

3
9+EA
16cEA
4
4
17+EA

3-4

Operands

immed8, accumulator
DX, accumulator

Transfers'

Bytes

10
8

2
1

POP destination

POP
Operands

Clocks

Transfers'

Bytes

8
8
17+EA

1
1
2

1
2-4

O D I T S Z A P C

Coding Example

NOT AX
NOT CHARACTER
O D I T S Z A P C

xxux

Coding Example

OR AL,BL
OR DX. PORT-ID [Dll

OR FLAG-BYTE,CL
OR AL,011011008
ORCX,OlH
OR [EX].CMD-WORD,OCFH

O D I T S Z A P C

Coding Example
OUT 44,AX
OUT DX.AL

Flags

Pop word off stack

register
seg-reg (CS illegal)
memory

Coding Example

Flags

Clocks

O D I T S Z A P C

NOP

Flags

OUT pori,accumulator
Output byte or word

OUT

NEG AL
NEG MULTIPLIER

Flags

Logical not

register
memory

O D I TX
S XZ XA XP1C'

Coding Example

Flags

Clocks

(no operands)

Flags

NOP (no operands)

No Operation

NOP

O D I T S Z A P C

Codlng Examph
POP DX
POP DS
POP PARAMETER

'Forlhe M60,add four clocks for each 16-bti wor4 transfer wilhan oddaddrsrs ForthcMM. add fourcIockSforeaCh l b b i i wcfd lransfar

Appendix F: 8086 Instruction Set Rtference Data

POPF (no operands)

Pop flags off stack

(POPF
Operands

Clocks

(no operands)

Transfers.

1 PUSH

register
seg-reg (CS legal)
memory

Coding Examplo

Bytes
1

POPF

PUSH source
Push word onto stack

Opersnds

Clocks

Transfers*

Bytes

11
10
16+EA

1
1

1
1
2-4

Clocks

Transfers'

Bytes

15+EA
20+EA+
41bit

2
2

2
2
2-4
2-4

8 + 41bit

RCR designation.count
Rotate right through carry
Operands

register, 1
register, CL
memory, 1
memory, CL

Clocks

2
2

2
2
2-4
2-4

RCL
RCL
RCL
RCL

O D I T S Z A P C
X

I
I

CX,1
AL,CL
ALPHA,l
[BP].PARM, CL

O D I T S Z A P C
X

Coding Exrmple
RCR
RCR
RCR
RCR

BX.1
BL,CL
[BX].STATUS, 1
ARRAY [DI], CL

Flags

I Clocks I Tranrfors* 1 Bytes

Coding Example

I Bytes

REP (no operands)

Repeat string operation

Operands

Flags

Flags

Transfers'

2
8+41bit
15+EA
20+EA+
41bit

REP

O D I T S Z A P C

RCL destlnation,count
Rotate left throuah carrv

register, 1
register, CL
memory, 1
memory, CL

RCR

PUSH SI
PUSH ES
PUSH RETURN-CODE [Sl]

Flags

Operands

O D I T S Z A P C

I Clocks I Transfers' 1 Bytes

Codlna
- ExamDle
I 10 I
1
I 1 I PUSHF

Operands
(no operands)

I RCL

Flags

Codlng Example

PUSHF (no operands)

Push flags onto stack

PUSHF

(no operands)

689

O D I T S Z A P C

Coding Example
REP MOVS DEST, SRCE

'ForlheEO&S, a d d f o u r c l o c k s ~ o r s a c h l ~ b i l w o r d l r ~ n r l e r w i l h ~ n o d d ~ dForIh.
d r ~ r r . W,add fourcloekaloraachlbblIwordtranrf@r.

Fundamentals of Digital Logic and Microcomputer Design

690

1 REPE/REPZ
I

REPE/REPZ (no operands)

Repeat strinQ
whileequallwhile zero
. ooeration
.

Operands

(no operands)

Operands
(no operands)

Clocks

Transfers'

Byles

Operands

1 ROL

Clocks

REPE CMPS DATA, KEY

Coding Example
REPNE SCAS INPUT-LINE

register. 1
register, CL
memory, 1
memory, CL

Clocks

Coding Example

1
2
2

1
3
1
3

Transfers

I Bytes I

ROL deslination.coun1
Rotate left

Operands

2
2

RET
RET 4
RET
RET 2

2
8+ 41 bit
15+EA
20+EA+
41bit

Clocks

Operand
register, CL
memory, 1
memory, CL

8 + 4 / bit
15+EA
20+EA+
41bit

[ SAHF

Clocks

Flags

7 -I k
Transfers'

SAHF (no operands)

Store AH into flags

Operands

Coding Examples
ROL BX,l
ROL DI,CL
ROL FLAG-BYTE [DI],1
ROL ALPHA .CL

22
2-4
2-4

ROR destination.count
Rotate riaht

ROR

O D I T S Z A P C

18
17

Flags

I Transfers' I Bytes

8
12

Coding Example

RET optional-pop-value
Return from procedure

(intra-segment, no pop)
(intra-segment, pop)
(inter-segmenl. no pop)
(inter-segment, pop)

O D I T S Z A P C

Flags

1 Transfers' 1 Bytes I

R ET

Clocks

Transfers'

Bytes

O D I T S Z A P C
X

Coding Example

ROR AL.1
ROR BX,CL
ROR PORTLSTATUS, 1
ROR CMD-WORD, CL

2-4

I Bytes

II

Flags

O D I T RS RZ RA RP RC

CodingExample

Appendix F: 8086 Instruction Set Reference Data

SAL/SHL destination.count
Shift arithmetic IeftlShift loaical left

SAL/SHL
ODerands

Clocks

register,l
register, CL
memory,l
memory, CL

Flags

I Transfers' I

Bvtes

2
2

2
2
2-4
2-4

2
8+4/bit
15+EA
20+ EA+
41bit

I SAR
Operands

SAL
SHL
SHL
SAL

Clocks

Transfers.

2
2

Bytes

Operands

SAR
SAR
SAR
SAR

Transfers'

Clocks
9+EA
16+EA
4

4
17+EA

O D I T S Z A P C

xxxxx

Coding Example
SBB
SBB
SBB
SBB
SBB
SBB

3-6

dest-string
(repeat) dest-string

SEGMENT^
Operands

(no operands)

SCAS dest-string
Scan string

Operands

Clocks

Transfea-Bytes

15

I
I

BX,CX
01, [BX].PAYMENT
BALANCE, AX
AX.2
CL. 1
COUNT [Si], 10

ISCAS

DX,?
DI,CL
N-BLOCKS. 1
N-BLOCKS,CL

Flags

Bytes
2
2-4
2-4
2-3
3-4

xxuxx

Coding Example

2
2
2-4
2-4

SBB destination,source
Subtract with borrow

register, register
register, memory
memory, register
accumulator, immediate
register, immediate
memory, immediate

AL.1
01, CL
[BX].OVERDRAW, 1
STORE-COUNT, CL

Flags

8+ 41bit
15+EA
20+EA+
41bil

I SBB

O D I T S Z A P C
X

Coding Examples

SAR destination,source
Shift arithmetic right

register, 1
register, CL
memory, 1
memory, CL

69 1

II

SEGMENT override prefix

Override to soecified seoment

Clocks

Translers'

Bytes
1

Flags

REPNE SCAS BUFFER

Flags

II

o D I Tx Sx Z
x xA xP C

Coding Example

O D I T S Z A P C

Coding Example
MOV SS:PARAMETER, AX

'For the 8006.add lour clocks for each 16-blt word transfer with an odd address For tne Boo. add four clocks for each 16 bil word transfer
tASM-86 tncorporales the segment override pretix into the operand SQBCIfICaliOnand not as a separate instruclion SEGMENT
2-21 only lor timing inlormation

IS

included In table

SHR destination.count
Shift logical right

SHR

Flags

Operands

Codlng Example

register, 1
register, CL
memory, 1
memory, CL

(SINGLE

SHR ID-BYTE (SI] [EX], 1

15+EA
20+EA+
4Ibit

STEP^

SINGLE STEP (Trap flag interrupt)

InterruDt if TF = 1

Flags

O D I T S Z A P C

Operands
(no operands)

ISTC

O D I T S Z A P C
X

I
I

Clocks

Transfers.

Bytes

50

NIA

NIA

STC (no operands)

Set carrv ilaa
.

Coding Example

Flags

O D I T S Z A P C
I

Coding Example
(no operands)

ISTD

I
I

Operands
(no operands)

STD (no operands)

Set direction flaa
Clocks

Transfers

Flags

Coding Example

Rytes
1

O D I T S Z A P C

STD
~~

STI (nooperands)
Set Interrupt enable flag

STI
Operands

Transiers

(no operands)

Clocks

Flags

STOS

Bytes
1

STOS dest-string
Store byte or word string
0pera nds

dest-string
l (repeat) dest-string

Transfers

Bytes

11

llrep

9+10/rep

Coding Example
STI

Flags

Clocks

O D I T S Z A P C

O D I T S Z A P C

Coding Example
STOS PRINT-LINE
REP STOSDISPLAY

Forthe 8086. add four clocks lor each 18-blt word transfer wlth an odd address For tne 8088. aaa lour clocks lor each 16-bit word traister
tSlNGLE STEP IS not an instruction. It IS mludea In table 2-21 only lor liming information

Appendix F: 8086 Instruction Set Reference Data

1 SUB

SUB destination.source
Subtraction

Operands
register, register
register, memory
memory, register
accumulator, immediate
register, immediate
memory, immediate

Clocks

Transfers'

9+EA
16+EA
4
4
17+EA

1
2

Bytes

2
2-4
2-4
2-3
3-4

3-6

I Clocks 1 Transfers' I

register, register
register, memory
accumulator, immediate
register, immediate
memory, immediate

IWAIT

3
9+EA
4
5
11 + A

Bytes

(no operands)

(XCHG

I
I

Operands

+ 5n

I Clocks 1 Transfers'

IXLAT'

XLAT source-table
Translate
Operands

Clocks
11

Bytes
1

O D I T S Z A P C

xxuxo

SI.DI
SI,END-COUNT
AL, OOlOOOOOB
BX.OCC4H
RETURN-CODE. 01H

Flags

Flags

O D I T S Z A P C

O D I T S Z A P C

XCHG AX,BX
XCHG SEMAPHORE, AX
XCHG AL, BL

Flags
Transfers'

WAIT

XCHG destination,source
Exchange

accumulator, reg16
memory, register
register, register

TEST
TEST
TEST
TEST
TEST

WAIT (no operands)

Walt whlle TEST oin not asserted

xxxxx

Coding Example

2
2-4
2-3
3-4
3-6

O D I T S Z A P C

Coding Example

Flags

Test or nondestructive logical and

Operands

Flags

SUB CX.BX
SUB DX, MATH TOTAL ISl]
SUB [BP+2],CL
S U B AL.10
SUB SI,5280
SUB [BP].BALANCE, 1000

TEST destination,source

TEST

source-table

693

O D I T S Z A P C

Coding Example
XLAT ASCIILTAB

'For fhe8086. add IOUrclocksIoreach l&bitwotd lransletwllhanoddaddress. Forlhe8088. add lour clocksfor each 16-blI word transfer

Fundamentals of Digital Logic and Microcomputer Design

694

XOR destinatlon,source
Logical exclusive or

XOR
Operands
register, register
register, memory
memory, register
accumulator, immediate
register, immediate
memory, immediate

Clocks

I Transfers' I Byte8

4
17+EA

9+EA
16+EA

1
2

2
2-4
2-4
2-3
3-4

36

I1

Flag6

x xZ uA xP oC
O D i T S

CodlngExrmpls
XOR
XOR
XOR
XOR
XOR
XOR

CX,BX
CL. MASK-BYTE
ALPHA [Sl], DX
AL,OlOOOOlOB
SI,00C2H
RETURN-CODE,ODZH