13 AC Regulators
13 AC Regulators
INTRODUCTION
By connecting a pair of thyristors or Triac in reverse
INTRODUCTION
Now, thyristor and Triac a.c. regulators have replaced
Classification
The a.c. voltage controllers can be classified as
Single-phase controllers and
Three-phase controllers.
Each type of controllers can be subdivided into
REGULATOR
voltage controllers.
Plot of
normalised
fundamental
component of
load current,
normalised values
of harmonics in
load current and
power factor
against
normalised RMS
load
load
load
T2 remains OFF from (++) to (2 + ). At (2 + ), T1 is turned-on.
With progressive decrease in , may become equal to .Under this
condition, when is just equal to , T1 will be ON from to ( + ) and
iT1 flows from to ( + ). Further, T2 will be ON from ( + ) to (2+ )
and current iT2 flows from + to (2 + ). Thus, when = ,
From
0 to T2 conducts.
from
to (
from
) T1 conducts
) to (2
) T2 conducts, and so on
This shows that load current will never become zero for any segment of
time and therefore, for all the time load is connected to source.
Hence, for = , the load voltage is equal to sinusoidal source voltage
provided the voltage drop in thyristors is neglected.
Under these conditions, load behaves as if it is being fed directly by the a.c.
source.
To determine the value of for which = and load is directly connected
to a.c. source, consider that the RL load, with load phase angle , is
connected directly to a.c. source. Under steady state, the load current will
be a sine wave and lag behind the voltage wave by an angle .
load
The current is positive from to ( + ) and negative from ( + )
to (2 + ). If it is required to obtain the current waveform of Fig. c
above, through the operation of power circuit of Fig. (a), then
From
0 to T2 conducts
to ( + ) T1 conducts
( + ) to (2 + ) T2 conducts, and so on
Comparison of expressions reveals that when = , = .
When = ,
and
sin ( ) = 0 = sin
or,
( ) =
= ( ) =
load
The rms output voltage can be found from
2
2
2
1/ 2
Eo [
2
E
sin
td
(
t
)]
s
2
2
Es
[4
4
Es
1/ 2
(
1
cos
2
t
)
d
(
t
)]
1
sin 2 sin 2
2
2
I rms [
1
2
1/ 2
i
d
(
t
)]
o
2
R / L ( t )
Es 1
[ {sin( t ) sin( )e }2 d (t )]1/ 2
Z
2 I rms
be found from
1
I av [
i d (t )]
2
o
R / L ( t )
2 Es
[sin(
sin(
)
e
d (t )]
2Z
Fig. 7
Gating Signals
load