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Roll No: - Enrollment No: - Gujarat Technological University

This document contains an exam for a microprocessor and interfacing course taken on February 21, 2012 at ATMIYA Institute of Technology and Science in Rajkot, Gujarat, India. The exam contains two questions, with the first asking the student to explain various 8085 microprocessor instructions and addressing modes, and the second asking about 8085 functional blocks, machine cycles, and interfacing memory devices.

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Het Patel
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62 views2 pages

Roll No: - Enrollment No: - Gujarat Technological University

This document contains an exam for a microprocessor and interfacing course taken on February 21, 2012 at ATMIYA Institute of Technology and Science in Rajkot, Gujarat, India. The exam contains two questions, with the first asking the student to explain various 8085 microprocessor instructions and addressing modes, and the second asking about 8085 functional blocks, machine cycles, and interfacing memory devices.

Uploaded by

Het Patel
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Roll No: ______

Enrollment No: ______


GUJARAT TECHNOLOGICAL UNIVERSITY

ATMIYA INSTITUTE OF TECHNOLOGY AND SCIENCE, RAJKOT


B. E. SEM. IV (EC)
Sub: Microprocessor and Interfacing
DATE: 21/2/2012
MARKS: 30
Q.1

(a)

Explain following instructions.


(1) LDAX Rp (2) Mov M,R (3) INX Rp (4) ADD M (5) IN 8-bit

(b)

Explain programming model of 8085.

(b)
(c)

(c)

Q-2

TIME: 7:30-8:30 a.m.

OR
Explain addressing modes with example.

Copy the data from location 3000H to register D using (1) LDA (2) 5
LDAX (3) MOV
OR
What would be result of following instructions.
5
A
H
L
CY S
Z
1055H
LXI H,1055H
MVI M,50H
MVI A,22H
ADD M
MOV M,A

(a)

Explain opcode fetch machine cycle.

(b)

Draw & explain functional block diagram of 8085.

(b)

OR
Define (1) machine cycle (2) assembly language (3) Compiler
(4) Microprocessor (5) ALU

(c)

Interface 4KB ROM and 8KB RAM with 8085.

(c)
1|Page

OR
Explain demultiplexing of lower order address and data bus. Also
explain requirement of demultiplexing.

5
5

2|Page

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