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Project Description Document: Area Efficient Universal Cryptography Using Des

This project aims to design an area efficient universal cryptography circuit using the Data Encryption Standard (DES) algorithm that can handle multiple cryptography algorithms with small chip area, low power consumption, and acceptable performance for use in smart cards and portable electronic devices. The project will involve a literature survey, analysis and design of the circuit using VHDL, implementation and experimentation, result analysis, and documentation over a total suggested duration of 13 weeks.

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AmreddyMallikarjunReddy
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27 views2 pages

Project Description Document: Area Efficient Universal Cryptography Using Des

This project aims to design an area efficient universal cryptography circuit using the Data Encryption Standard (DES) algorithm that can handle multiple cryptography algorithms with small chip area, low power consumption, and acceptable performance for use in smart cards and portable electronic devices. The project will involve a literature survey, analysis and design of the circuit using VHDL, implementation and experimentation, result analysis, and documentation over a total suggested duration of 13 weeks.

Uploaded by

AmreddyMallikarjunReddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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PROJECT DESCRIPTION DOCUMENT

(Not to exceed one page)

Faculty Name
Department
Project Title

ECE
AREA EFFICIENT UNIVERSAL CRYPTOGRAPHY USING DES

Cryptography circuits for smart cards and portable electronic


devices

provide

user

authentication

and

secure

data

communication. These circuits should, in general, occupy small


chip area, consume low power, handle several cryptography
algorithms, and provide acceptable performance.

Hardware/Equip
. Requirements
Software
Requirements

VHDL,Xilinx tools
Recommended
Duration
3 weeks

Project Activity
Literature Survey
Analysis and Design
Implementation/Experiment
ation
Result Analysis

4 weeks

Documentation

1 week

Overall

13 weeks

3 weeks
2 weeks

Suggested Readings
Books
1.BHASKAR.J

VHDL PRIMER

2.DOUGLAS L.PERRY

VHDL

3.STEPHEN BROWN AND

Journals

Websites

Any other information

FUNDEMENTAS OF DIGITAL LOGIC

Suggested Duration by
Faculty

Date:
Signature

Faculty

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