ELEC 464 : M ICROCOMPUTER S YSTEM D ESIGN

1996/97 W INTER S ESSION T ERM 1

The Intel 8088 Architecture and Instruction Set

This lecture describes a subset of the 8088 architecture and instruction set. While its not possible to cover all the
details of the 8088 in one lecture you should learn enough about the 8088 to be able to:
write simple program in 8088 assembly language including: (1) transfer of 8 and 16-bit data between registers
and memory using register, immediate, direct, and register indirect addressing, (2) some essential arithmetic and
logic instructions on byte and 16-bit values, (3) stack push/pop, (4) input/output, (5) [un]conditional branches,
(6) call/return, (7) interrupt/return, (8) essential pseudo-ops (org, db, dw).
compute a physical address from segment and offset values,
describe response of 8088 to NMI, software (INT) and external (IRQ) interrupts and return from interrupts.

History

rupts/exceptions.
There are also three segment registers (CS, DS,
SS) which are used to allow the code, data and
stack to be located in any three 64 kByte segments
within a 1 megabyte (20-bit) address space as described below.

The original Intel 16-bit CPU was the 8086. It was

designed to be backwards-compatible at the assembler level with Intels 8-bit CPU, the 8080. The 8088
is a version of the 8086 with an 8-bit data bus. The
8088 was used in the original IBM PC and its many
clones. Later versions of the 8086 include the i386
which extends the data and address registers to 32
bits and includes support for memory protection and
virtual memory.

Instruction Set
Data Transfer
Transfer of 8 and 16-bit data is done using the MOV
instruction. Either the source or destination has to
be a register. The other operand can come from another register, from memory, from immediate data (a
value encoded in the instruction) or from a memory
location pointed at by register BX. For example, if
COUNT is the label of a memory location the following are possible:

Registers

The 8088 includes has four 16-bit data registers (AX,

BX, CX and DX). BX can also be used as an address
register for indirect addressing. The most/least significant byte of each register can also be addressed
directly (e.g. AL is the LS byte of AX, CH is MS
byte of CX).
; register: move contents of BX to AX
Three bits in a 16-bit program status word (PSW)
MOV
AX,BX
are used to indicate whether the result of the previ- ; direct: move contents of AX to memory
MOV
COUNT,AX
ous arithmetic/logical instruction was zero, negative, ; immediate: load CX with the value 240
or generated a carry. An interrupt enable bit controls
MOV
CX,0F0H
; register indirect: move contents of AL
whether interrupt requests on the IRQ pin are recog- ; to memory location in BX
nized.
MOV
[BX],AL
The address of the next instruction to be executed
16-bit registers can be pushed (SP is first decreis held in a 16-bit instruction pointer (IP) register (the
mented by two and then the value stored at SP) or
program counter).
popped (the value is restored from memory at SP and
Exercise: How many bytes can be addressed by a 16then SP is incremented by 2). For example:
bit value?

A 16-bit stack pointer (SP) is used to implement a stack to support subroutine calls and inter-

PUSH
POP

AX
BX

; push contents of AX
; restore into BX

I/O Operations

stack during a CALL instruction and the contents of

IP are popped by the RET instructions. For example:

The 8088 has separate I/O and memory address

spaces. Values in the I/O space are accessed with
IN and OUT instructions. The port address is loaded
into DX and the data is read/written to/from AL or
AX:
MOV
OUT

CALL
...
readchar:
...
RET

DX,372H ; load DX with port address

DX,AL
; output byte in AL to port
; 372 (hex)
AX,DX
; input word to AX

readchar

Interrupts and Exceptions

In addition to interrupts caused by external events

(such as an IRQ signal), certain instructions such as
a dividing by zero or the INT instruction generate
Arithmetic/Logic
exceptions.
Arithmetic and logic instructions can be performed
The 8088 reserves the lower 1024 bytes of memon byte and 16-bit values. The first operand has to ory for an interrupt vector table. There is one
be a register and the result is stored in that register.
4-byte vector for each of the 256 possible interrupt/exception numbers. When an interrupt or ex; increment BX by 4
ception occurs, the processor: (1) clears the interrupt
ADD
BX,4
flag in the PSW, (2) pushes PSW, CS, and IP (in that
; subtract 1 from AL
SUB
AL,1
order), (3) loads IP and CS (in that order) from the
; increment BX
appropriate interrupt vector location, and (4) transINC
BX
fers control to that location.
; compare (subtract without storing result)
CMP
AX,MAX
For external interrupts (IRQ or NMI) the interrupt
; mask in LS 4 bits of AL
number
is read from the data bus during an interrupt
AND
AL,0FH
; shift AX right
acknowledge bus cycle. For internal interrupts (e.g.
SHR
AX
INT instruction) the interrupt number is determined
; set MS bit of CX
OR
CX,8000H
from the instruction.
; clear AX
The INT instruction allows a program to generate
XOR
AX,AX
any of the 255 interrupts. This software interrupt
is typically used to access operating system services.
IN

Control Transfer

Exercise: MS-DOS programs use the INT 21H instruc-

Conditional jumps transfer control to another address

depending on the state of the flags in the PSW. Conditional jumps are restricted to a range of -128 to
+127 bytes from the next instruction while unconditional jumps can be to any point within the 64k code
segment.

tion to request operating system services. Where would

the address of the entry point to these DOS services be
found?

; jump if last result was zero (two values equal)

JZ
skip
; jump on less than
JL
smaller
; jump if carry set (below)
JC
neg
; unconditional jump:
JMP
loop

The CLI and STI instructions clear/set the

interrupt-enable bit in the PSW to disable/enable external interrupts.
The IRET instruction pops the IP, CS and PSW
values from the stack and thus returns control to the
instruction following the one where interrupt or exception occurred.

Pseudo-Ops

A number of assembler directives (pseudo-ops) are

The CALL and RET instructions call and return also required to write assembly language programs.
from subroutines. The processor pushes IP on the ORG specifies the location of code or data within the
2

segment, DB and DW assemble bytes and words of

constant data respectively.

MOV
MOV

BX,COUNT
; load value of COUNT
BX,OFFSET COUNT ; load location of COUNT

Hex and binary constants are indicated by using an

H or B suffix after the number. A leading 0 must be
Since address registers are only 16 bits wide they are added if the first digit of a hex constant is not a digit.
always used together with with one of the segment
registers to form a 20-bit address. This is done by
Example
shifting the segment register value left by 4 bits before adding it to the address register. DS (data seg- This is a simple program that demonstrates the main
ment) is used for data transfer instructions, CS (code features of the 8088 instruction set. It uses the INT
segment) is used with control transfer instructions, operation to invoke MS-DOS to write characters to
and SS is used with the stack pointer.
the screen.

Segment/Offset Addressing

Exercise: If CX contains 1122H, SP contains 1234H,

and SS contains 2000H, what memory values will change
when the PUSH CX instruction is executed?

; Sample 8088 assembly language program. This program

; prints the printable characters in a null-terminated
; string (similar to the unix ("strings" program).

The use of segment registers reduces the size of

pointers to 16 bits. This reduces the code size but
also restricts the addressing range of a pointer to
64k bytes. Performing address arithmetic within data
structures larger than 64k is awkward. This is the
biggest drawback of the 8088 architecture.
We will restrict ourselves to short programs where
all of the code, data and stack are placed into the
same 64k segment (i.e. CS=DS=SS).

;
;
;
;

code segment public

assume cs:code,ds:code
org
100h
start:
mov
loop:
mov
cmp
jz
cmp
jl
call
noprt:
inc
jmp

Byte Order
When multi-byte values are stored in memory the
bytes are stored with the least-significant byte at
the lowest memory location (so-called little-endian
format). This is the opposite of the big-endian order used by Motorola processors.
Exercise:

There is only one "segment" called "code" and the

linker can assume DS and CS will be set to the right
values for "code". The code begins at offset 100h
within the segment "code" (MS-DOS .COM files).

done:
int

If memory locations 1000 and 1001 have

values 01 and 02, what value will be loaded into AX if the

16-bit word at address 1000 is loaded into AX?

bx,offset msg

; bx points to string

al,[bx]
al,0
done
al,32
noprt
printc

;
;
;
;
;
;

bx
loop

; point to next character

; and loop back

20h

; return to DOS

load a character into al

see if its a zero
quit if so
see if its printable
dont print if not
otherwise print it

; subroutine to print the byte in al

8088 Assembly Language

The operand format is destination,source, e.g.
MOV AX,13H loads AX with 19.
The assembler keeps track of the type of each symbol and uses it select immediate or direct addressing.
This can be changed by using the OFFSET operator
to convert a memory reference to a 16-bit value. For
example:

printc:
push
push
mov
mov
int
pop
pop
ret

ax
dx
dl,al
ah,02H
21H
dx
ax

msg

This,9,31,32,is,20H,a string.,0

db

; push ax and dx
; use DOS to
; print character
; restore ax and dx

; example of how to reserve memory (not used above):

buf

db

128 dup (?)

; 128 uninitialized bytes

code ends
end

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