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Unit - 6 Implementation of FFT Algorithm

This document describes the implementation of a FFT algorithm using an in-place butterfly computation structure. It includes: 1) The data and constants used in the butterfly computations, including real and imaginary parts of the input signals and twiddle factors. 2) Code that performs the butterfly computations by moving data between registers and memory locations, multiplying input signals by twiddle factors, and storing the results. 3) Functions for clearing memory, bit reversing the order of data, and the main butterfly computation routine.

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50 views6 pages

Unit - 6 Implementation of FFT Algorithm

This document describes the implementation of a FFT algorithm using an in-place butterfly computation structure. It includes: 1) The data and constants used in the butterfly computations, including real and imaginary parts of the input signals and twiddle factors. 2) Code that performs the butterfly computations by moving data between registers and memory locations, multiplying input signals by twiddle factors, and storing the results. 3) Functions for clearing memory, bit reversing the order of data, and the main butterfly computation routine.

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9chand3
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UNIT -6

Implementation of FFT Algorithm

A butterfly computation
A general DIT FFT butterfly in-place computation structure is
shown below.
Its implementation requires the following computations.

.mmregs
.def_c_int00
.data
X0R .Word 0 ; real part of X0
X0I .Word 0 ; imag part of X0
X1R .Word 0
X1I .Word 0
X2R .Word 0
X2I .Word 0
X3R .Word 0
X3I .Word 0
X4R .Word 0
X4I .Word 0
X5R .Word 0
X5I .Word 0
X6R .Word 0
X6I .Word 0
X7R .Word 0
X7I .Word 0

x0 .Word 0
x1 .Word 23170
x2 .Word 32767
x3 .Word 23170
x4 .Word 0
x5 .Word -23170
x6 .Word -32767
x7 .Word -23170
W08R .Word 32767
W08I .Word 0
W18R .Word 23170
W18I .Word -23170
W28R .Word 0
W28I .Word -32767
W38R .Word -23170
W38I .Word -23170
;---------------------------; butterfly scratch pad loactions
TMP1 .Word 0
TMP2 .Word 0
.text

STM #X0R,AR1
STM #X2R,AR2
STM #W08R,AR3
CALL_butterfly

STM #X1R,AR1
STM #X5R,AR2
STM #W18R,AR3
CALL_butterfly

STM #X0R,AR1
STM #X1R,AR2
STM #W08R,AR3
CALL_butterfly

STM #X1R,AR1
STM #X3R,AR2
STM #W28R,AR3
CALL_butterfly

STM #X2R,AR1
STM #X6R,AR2
STM #W28R,AR3
CALL_butterfly

STM #X2R,AR1
STM #X3R,AR2
STM #W08R,AR3
CALL_butterfly
STM #X6R,AR1
STM #X7R,AR2
STM #W08R,AR3
CALL_butterfly

STM #X4R,AR1
STM #X6R,AR2
STM #W08R,AR3
CALL_butterfly

STM #X3R,AR1
STM #X7R,AR2
STM #W38R,AR3
CALL_butterfly

STM #X5R,AR1
STM #X7R,AR2
STM #W28R,AR3
CALL_butterfly

STM #X0R,AR1
STM #S0,AR2
STM #7,AR3
nop
nop

_c_int00:
SSBX SXM
CALL_clear
CALL_bitrev

STM #X0R,AR1
STM #X4R,AR2
STM #W08R,AR3
CALL_butterfly

_bitrev:
STM #X0,AR1
STM #X0R,AR2
STM #8,AR0
STM #7,AR3

loop:
LD *AR1+,A
STL A,*AR2+,0B
BANZ loop, *AR3RET
nop
nop

_clear:
STM #X0R,AR2
RPT #15
ST #0,*AR2+
RET
nop
nop
;---------------------------------------

_butterfly:
MVMM AR1,AR5
STM #TMP1,AR4
LD *AR5, -2,A
STL A *AR5+
LD *AR5,-2,A
STL A,*AR5LD *AR2,-2,A
STL A,*AR2+
LD *AR2,-2,A
STL A *AR2LD *AR5+,A
STL A,1,*AR4+
LD *AR5-,A
STL A,1,*AR4-

LD #0,A
MPY *AR2+,*AR3+,A
MAS *AR2-,*AR3,A
ADD *AR5,15,A
ADD #1,14,A
STH A,1,*AR5+
LD #0,A
MPY *AR2+,*AR3-,A
MAC *AR2-,*AR3,A
ADD *AR5,15,A
ADD #1,14,A
STH A,1,*AR5-

LD *AR4+,A
SUB *AR5+,A
STL A,*AR2+
LD *AR4-,A
SUB *AR5-,A
STL A, *AR2
RET
nop
nop

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