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Optical Computing

The document discusses various non-Von Neumann computer architectures including the Harvard architecture, modified Harvard architecture, and MIMD architecture. The Harvard architecture separates the program memory from the data memory allowing parallel read/write. The modified Harvard architecture uses a shared cache or memory. MIMD architecture uses multiple independent processors that can concurrently operate on separate data streams from shared memory. Examples of architectures discussed include ARM, DSPs, and parallel supercomputers.

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Jagan Rajendiran
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29 views

Optical Computing

The document discusses various non-Von Neumann computer architectures including the Harvard architecture, modified Harvard architecture, and MIMD architecture. The Harvard architecture separates the program memory from the data memory allowing parallel read/write. The modified Harvard architecture uses a shared cache or memory. MIMD architecture uses multiple independent processors that can concurrently operate on separate data streams from shared memory. Examples of architectures discussed include ARM, DSPs, and parallel supercomputers.

Uploaded by

Jagan Rajendiran
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Non Von Neumann

Architectures
By Dylan Ayrey and Joshua Pueschel

The agenda

Review of the Von Neumann Model


What is the Harvard Architecture
What is the Modified Harvard Architecture
Examples/Current Uses
SHARC
MIMD

The Von Neumann Model


Pure von neumann model
Completed one after another
Limited by previous instruction

Von Neumann Bottleneck


Wait for new
instructions
Idle time
Hacky
workarounds
(caching, multi
threading etc..)

Harvard Architecture: What is it?

Von Neumann
alternative
Data memory and
program instructions
kept separate
Parallel read/write from
program instructions
and data memory

Separate memory
buses

Where did it come from?

Harvard Mark I

Started in 1937 by IBM


Finished in 1944
Used in war effort
First program it ran created
by John Von Neumann to
calculate nuclear bomb
science
Paper punch tape

Predates Von Neumann


model (1945)
Still used today

Modified Harvard Architecture


Common modifications
Shared memory/split cache

Most modern implementations are modified


Current ARM Architectures
x86

Modern examples
ARM9/ARM11
Cellphones
Raspberry pi
Nintendo

Digital Signal Processors

AMD Athlon 64 Cache Hierarchy


Modified
harvard
architecture
split L1
Cache
Shared L2
cache

Cache Structure of ARM9 Processor


Two distinct
caching
levels
Shared
common
memory

SHARC Architecture
Extended cache for instruction reuse
Allows program bus to transfer data memory
DSP architecture

SHARC Architecture

Modified Von Neumann


DSP Example
Need multiple memory accesses in a single
instruction
Speed up the memory clock to be faster than
a single instruction cycle

Other Non Von Neumann

Analog Computers
Optical Computers
Quantum Computers
Cell Processors
DNA
Neural Networks
MIMD architecture

Non Von Neumann


Parallelism
Complex / low programmability

uPD7281D
image pipelined processor
Could process different commands simultaneously

MIMD Architecture
Multiple Instruction stream, Multiple Data
Independent processors that operate on
separate data concurrently
Shared memory

MIMD Architecture Cont.

Design problems

Processor design
Physical organization
Interconnection structure
Inter-processor communication protocols
Memory hierarchy
Cache organization and coherency
Operating system design
Parallel programming languages
Application software techniques

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