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Cadforvlsicircuitsjune2012 140505082922 Phpapp02

This document is an exam for a June 2012 M.E. Degree Examination in VLSI Design. It contains two parts. Part A has 10 short answer questions worth 2 marks each about general topics in VLSI CAD such as general-purpose integrated circuits, integer linear programming, symbolic layout editors, partitioning problems, floorplanning algorithms, and local routing parameters. Part B has 5 longer answer questions worth 16 marks each about specific VLSI CAD topics such as design domains, design rule checking, graph representations, placement algorithms, constraint graph compaction, floorplanning concepts, channel routing algorithms, gate-level simulation issues, ROBDD construction and manipulation, and assignment problem optimization and formulation.

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Senthil Sivakumar
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25 views3 pages

Cadforvlsicircuitsjune2012 140505082922 Phpapp02

This document is an exam for a June 2012 M.E. Degree Examination in VLSI Design. It contains two parts. Part A has 10 short answer questions worth 2 marks each about general topics in VLSI CAD such as general-purpose integrated circuits, integer linear programming, symbolic layout editors, partitioning problems, floorplanning algorithms, and local routing parameters. Part B has 5 longer answer questions worth 16 marks each about specific VLSI CAD topics such as design domains, design rule checking, graph representations, placement algorithms, constraint graph compaction, floorplanning concepts, channel routing algorithms, gate-level simulation issues, ROBDD construction and manipulation, and assignment problem optimization and formulation.

Uploaded by

Senthil Sivakumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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M.E.

DEGREE EXAMINATION, JUNE 2012


Second Semester
VLSI Design
VL9221/252204/VL 921CAD FOR VLSI CIRCUITS
(Common to M.E. Applied Electronics)
(Regulation 2009)

Time : Three hours

Maximum : 100 Marks


Answer ALL Questions
PART A (10 2 = 20 Marks)

1. List out the general-purpose integrated circuits.


2. Define integer linear programming.
3. What is the job of symbolic layout editor?
4. What does the partitioning problem deal with?
5. Formulate the sizing algorithm for slicing floor plans.
6. List the parameters characterizing the local routing problem.
7. Compare static partitioning and dynamic partitioning.
8. Write the problem definition for two level logic synthesis.
9. Write the demerit and ASAP scheduling.
10. Define supervertices.

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PART B (5 16 = 80 Marks)

11. (a)

(i)

Explain the design domains to describe the VLSI design process.

(ii)

What are the ways of checking the correctness of an IC without actually

fabricating it?

(8)

(8)
Or

(b)

12. (a)

(i)

Explain a suitable data structure to represent a graph.

(8)

(ii)

Write the Prims algorithm for minimum spanning trees.

(8)

(i)

With diagram explain the minimum distance design rules.

(8)

(ii)

List the types of placement problem and explain.

(8)

Or
(b)

13. (a)

Write the algorithms for constraint-graph compaction.

(16)

Describe the concepts of floorplanning.

(16)

Or
(b)

14. (a)

Write the algorithms used for channel routing.

(16)

Explain the various issues related to gate-level simulation.

(16)

Or
(b)

15. (a)

Explain the principle, construction and manipulation of ROBDD.

(16)

With suitable diagrams explain the types of data flow.

(16)

Or
(b)

Explain the optimization issues and formulation of assignment problem.

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(16)

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