Scribd
Upload
1K views2 pages

A 4-Bit Binary Adder

One disadvantage of cascading 1-bit binary adders to add large numbers is propagation delay, where the output sum is invalid until any carry input ripples through the chain. This delay becomes prohibitively large for large adders. A solution is to use carry look-ahead logic to directly generate carry inputs from the A and B inputs, creating a carry look-ahead adder with improved speed. To subtract two 4-bit binary numbers using an adder, the bits of the second number are inverted and a 1 is added using the carry input.

Uploaded by

Jaspreet Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
1K views2 pages

A 4-Bit Binary Adder

One disadvantage of cascading 1-bit binary adders to add large numbers is propagation delay, where the output sum is invalid until any carry input ripples through the chain. This delay becomes prohibitively large for large adders. A solution is to use carry look-ahead logic to directly generate carry inputs from the A and B inputs, creating a carry look-ahead adder with improved speed. To subtract two 4-bit binary numbers using an adder, the bits of the second number are inverted and a 1 is added using the carry input.

Uploaded by

Jaspreet Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 2

A 4-bit Binary Adder

One main disadvantage of cascading together 1-bit binary adders to add large binary numbers is that if inputs A
and B change, the sum at its output will not be valid until any carry-input has rippled through every full adder in
the chain. Consequently, there will be a finite delay before the output of a adder responds to a change in its inputs
resulting in the accumulated delay, especially in large multi-bit binary adders, becoming prohibitively large.
This unwanted delay time is called Propagation delay. Also another problem called overflow occurs when an n-
bit adder adds two numbers together whose sum is greater than or equal to 2
n

One solution is to generate the carry-input signals directly from the A and B inputs rather than using the ripple
arrangement above. This then produces another type of binary adder circuit called a Carry Look Ahead Binary
Adder were the speed of the parallel adder can be greatly improved using carry-look ahead logic.
The 4-bit Binary Subtractor
Now that we know how to ADD together two 4-bit binary numbers how would we subtract two 4-bit binary
numbers, for example, A B using the circuit above. The answer is to use 2s-complement notation on all the bits in
B must be complemented (inverted) and an extra one added using the carry-input.

This can be achieved by inverting each B input bit to the binary subtractor by using an inverter or NOT-gate on each
input.
Also, in the above circuit for the 4-bit binary adder, to perform addition the first carry-in input is held LOW at logic
0. But for the circuit to perform the mathematical condition of subtraction this input pin needs to be held HIGH at
logic 1.
With this in mind a ripple carry adder can with a small modification be used to perform half subtraction, full
subtraction and/or comparison.
There are a number of 4-bit full-adder ICs available such as the 74LS283 and CD4008. which will add two 4-bit
binary number and provide an additional input carry bit, as well as an output carry bit, so you can cascade them
together to produce 8-bit, 12-bit, 16-bit, etc. adders.
s

You might also like