This document provides instructions for a lab experiment to characterize a MOSFET device and analyze its behavior. The objectives are to study the MOSFET's characteristics, define its behavior in terms of terminal voltages and currents, and perform parametric analysis. The procedure describes constructing a test circuit schematic in Virtuoso and using the ADE L simulator to sweep input voltages, plot output characteristics like ID-VG and ID-VD, and analyze transconductance gm.
This document provides instructions for a lab experiment to characterize a MOSFET device and analyze its behavior. The objectives are to study the MOSFET's characteristics, define its behavior in terms of terminal voltages and currents, and perform parametric analysis. The procedure describes constructing a test circuit schematic in Virtuoso and using the ADE L simulator to sweep input voltages, plot output characteristics like ID-VG and ID-VD, and analyze transconductance gm.
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 1/8
LAB 1: MOSFET Characteristics
Objectives: 1. To study the semiconductor device characteristic of a MOSFET. 2. To define the behavior of the MOSFET in terms of its terminal voltages and currents. 3. To carry out the parametric analysis for MOSFET.
Procedure: 1. Double clicks at icon VMware Workstation, clicks Power on This Virtual Machine. Next, type in the Username and password and press enter.
2. Red Hat Linux 4 will appear. Then right click and chose Open Terminal. In the terminal, type cd silterraC13_Apr2011 command and press enter. Next, type virtuoso command and press enter.
3. After Virtuoso window appear, click Tools > Library Manager. The Library Manager:WorkArea will appear.
4. To create your working directory in Library Manager, click File > New > Library, then insert your library name for example Lab in the new pop up New Library window. Then click OK.
5. Then Technology File for New Library will pop up. Choose Attach to an existing techfile button and click OK.
6. Select silterraC13 and click OK at Attach Design Library to Technology File window.
7. In the Library Manager:WorkArea window, the new library Lab has been created.
8. To create the schematic workspace, highlight your library name Lab , then go to File > New > Cell View. Then insert your Cell Name Lab1 in the new Create New File window and click OK.
9. The Virtuoso Schematic Editor will apprear for you to create your schematic.
10. Construst the schematic given in Figure 1.
W 20m L 130nm = GS V = DC DS V V 1 M
Figure 1 : Schematic of NMOS transistor
11. To choose the component, click Add > Instance. Then, click the Browse button to find the component that you want as shown in Figure 2. To change the parameters of the instance, select the instance (by clicking on it with the mouse) and then use properties icon or press q. HRK Lab 1 MOSFET Characteristics
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 2/8
Figure 2 : Instantiation of the single stage transistor
12. Complete plugging in the parameter of the circuit as given in Figure 1. Click at Check and Save button to check and to automatically save your design. Make sure you look at the CIW window and there are no errors or warnings, if there are any, you have to go back and fix them.
13. Click Launch > ADE L to simulate the circuit. In the Analog Design Environment window, click Setup > Simulator/Directory/Host, choose spectre and click OK as shown in Figure 3.
Figure 3 : Selected Simulator (Spectre)
14. In the Virtuoso Analog Design Environment window, click Setup > Model Libraries, delete all the model files and choose the correct Model File and Section as shown in Figure 4.
HRK Lab 1 MOSFET Characteristics
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 3/8
Figure 4 : Selected model library
15. Then click OK. Your Analog Design Environment window will appear for you to select the input Variables. Click Variable > Edit then the Editing Design variables window will appear. Insert the input variables in the Name column and its value in the Value (Expr) column, and then click OK, as shown Figure 5.
16. For the output, click Outputs > To Be Plotted > Select On Schematic. Here you need to choose the output from the schematic (in this case, select the negative terminal of V DS supply). Press Esc after selecting the output. Be sure at the Outputs > Save All > click all button to save all your simulation output results.
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 4/8 17. Then choose the analysis type by click Analyses > Choose > dc and click on Save DC Operating Point. Then click at Design Variable box, insert the Variable Name and Sweep Range as shown in Figure 6 and click OK.
Figure 6 : Simulation of single stage
18. Finally, to run simulation, click Simulation > Netlist & Run. The graph that shows I/V characteristics for NMOS will appear. Your graphs should be similar as in Figure 7 and Figure 8. It shows graph for DS I vs GS V (when DS V = 1.2 V) and DS I vs DS V (when GS V = 600 mV) .
Figure 7 : DS I vs GS V when DS V = 1.2 V
HRK Lab 1 MOSFET Characteristics
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 5/8
Figure 8 : DS I vs DS V graph when GS V = 600 mV
(Note: If there is any change of schematic, click at Check and Save button. Recreate netlist needs to be done in the Analog Design Environment, click Simulation > Netlist > recreate first then Simulation > Netlist & Run)
19. To determine various values of GS V , click Tools > Parametric Analysis. Then Parametric Analysis will pop up. Then click Setup > Pick Name for Variable > Sweep 1. Choose the variable GS V form the Parametric Analysis Pick Sweep 1, and then click OK.
20. Then insert the Range type and Step Control as show in Figure 9. Then click Analysis > Start to obtained the results as shown in Figure 9.
Figure 9 : Parametric analysis of single stage amplifier
21. The graph obtained after simulation should be as shown in Figure 10. Record the reading in Table 1.
HRK Lab 1 MOSFET Characteristics
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 6/8
(a)
(b)
Figure 10 : NMOS characteristics, (a) DS I vs DS V and (b) DS I vs GS V
Table 1: Result of DS I vs DS V ( ) GS V V 0.5 0.6 0.7 ( ) DS I A
( ) DS V V 0.9 0.9 0.9
(Note: In the Analog Design Environment, save the dc analysis process that was evaluated by clicking Session > Save State > dc_NMOS_analysis.) 22. What is the value of DS V when DS I
= 150 A and GS V = 0.6 V?
23. Applying the same steps to obtain the DS I vs DS V , we can obtain the DS I vs GS V
graph as shown in Figure 10(b). The graph shows that the smaller the SB V is the higher DS I will flow through the NMOS. HRK Lab 1 MOSFET Characteristics
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 7/8
24. To plot the m g
graphs ( m g vs TN GS V - V ), in Analog Design Environment, click Tools > Result Browser. Result Browser window will pop up, click dcOpInfo-info > NM0 > main choose g m and use right hand button to select Calculator. Calculator window will pop up containing the g m info that was selected in Result Browser.
25. Go back to the Analog Design Environment, double click at the VDD/MINUS in the Outputs area to pop up the Setting Output window. Click on New Expression button, follow by Get Expression button. In the Expression column there is the detail about the m g that was selected before. Type in any name in Name (opt.) column such as m g . Click OK.
26. Go back to the Result Browser window, select vgs then use right hand button to select Calculator. Without do other things, repeat the same procedure to select vth following by clicking minus (-) button in the Calculator. Now, in the calculator display both vgs and vth information will be appeared. Repeat the same step as in procedure 25 and type in any name in Name (opt.) column such as vgs- vth.
Click OK.
27. Simulate the data that was in the Analog Design Environment. Ensure to sweep your GS V
from 0 to 1 in Parametric Analysis and produce the graph as shown in Figure 11. (To change the axis, double click on the axis and the Axis Attributes window will pop up for editing). Explain the graph.
Figure 11 : m g vs TN GS V - V graph when W/L constant
28. Using the same procedure, plot m g vs DS I (when W/L constant) and m g vs TN GS V - V (when DS I constant by adding a 2 mA Current Source to the Drain of schematic). Your graph will be as shown in Figure 12 and Figure 13.
HRK Lab 1 MOSFET Characteristics
KEEE 4469 Analog VLSI Circuit Design SEM-1 2013/2014 8/8