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8-Bit Array Multiplier

This document describes the design and analysis of a 28-T CMOS full adder circuit and an 8-bit array multiplier circuit. It discusses how the full adder was implemented using four modules to calculate the sum and carry outputs. Test patterns were generated in Matlab to calculate the power and switching of the full adder. An 8-bit array multiplier was also implemented using 49 carry save adders, 8 carry propagate adders, and 15 AND gates. A test bench was generated using an LFSR to test the circuits.

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Kyle Sanders
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© © All Rights Reserved
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Download as PPTX, PDF, TXT or read online on Scribd
554 views

8-Bit Array Multiplier

This document describes the design and analysis of a 28-T CMOS full adder circuit and an 8-bit array multiplier circuit. It discusses how the full adder was implemented using four modules to calculate the sum and carry outputs. Test patterns were generated in Matlab to calculate the power and switching of the full adder. An 8-bit array multiplier was also implemented using 49 carry save adders, 8 carry propagate adders, and 15 AND gates. A test bench was generated using an LFSR to test the circuits.

Uploaded by

Kyle Sanders
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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8-bit array

multiplier
SUBMITTED TO:- SUBMITTED BY:-
PROF. BISWAJIT MISHRA VINEET SHARMA
SOUMYA GARGAVE
28-T CMOS Full adder
We have designed 28-T CMOS full adder in which we have four
modules , C
out_bar
, C
out
, Sum_bar and Sum.
Continue
To calculate the power/switching , all test pattern has been
generated using Matlab and a PWL file is created by this.
PWL is loaded in Virtuoso and average power of full adder is
calculated.
Power is divided by number of transition to calculate the
power/switching.
8-bit array multiplier
8-bit array multiplier is implemented using 49 carry save adder and 8
carry propagate adder and 15 AND gates.
Test bench is generated by using LFSR.
Basic adder is called as instances.

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