This document outlines an assignment for an Analog Electronics course. It includes 10 questions covering various topics: (1) the Hall effect and its uses, (2) advantages of semiconductors, (3) calculating intrinsic resistivity of silicon, (4) definitions of amphoteric impurities and compensated semiconductors, (5) the Fermi level in intrinsic and doped semiconductors, (6) deriving an equation for a common collector amplifier, (7) analyzing the Q-point and gain of a CE amplifier, (8) characteristics of MOSFETs, (9) calculating gate-source voltage for a JFET, and (10) submitting the assignment by July 12th
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Eee 2202 Assignment
This document outlines an assignment for an Analog Electronics course. It includes 10 questions covering various topics: (1) the Hall effect and its uses, (2) advantages of semiconductors, (3) calculating intrinsic resistivity of silicon, (4) definitions of amphoteric impurities and compensated semiconductors, (5) the Fermi level in intrinsic and doped semiconductors, (6) deriving an equation for a common collector amplifier, (7) analyzing the Q-point and gain of a CE amplifier, (8) characteristics of MOSFETs, (9) calculating gate-source voltage for a JFET, and (10) submitting the assignment by July 12th
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EEE 2202 ANALOGUE ELECTRONICS ASSIGNMENT
a) What is Hall effect? Explain atleast six uses of Hall effect.
b) Give seven advantages of semiconductors devices. c) At 300K, the intrinsic carrier contentration of silicon is 1.5 10 16 M -3 . If the electron and hole mobilities are 0.13 and 0.05 m 2 /(V.s) respectively, determine the intrinsic resistivity of silicon at 300K. d) Explain the terms i) Amphoteric impurity and ii) Compensated semiconductor. e) What is the position of the Fermi level in an intrinsic semiconductor? How does its position change when i) Donors, and ii) Acceptors are added to the semiconductor.? What happens if the temerature is raised? f) For a common collector configuration, derive the relation I E = 0 I B + I CEO. What is early voltage? Illustrate . g) In the C E amplifier circuit shown below, R 1 = 72 K, R 2 = 8K, R L = 2K, R E = 700 ohms, and R C = 2 K and V CC = 15V. Assume = 120 and V BE = 0.7V.
i) Draw the dc loadline and find the Q point. ii) Draw the ac load line iii) If the input ac signal V I has the amplitude of 1 mV, find the amplitude of the output voltage V O. (Take the input resistance of the amplifier, Rin = 1.5K. All the capacotors act as ac shorts). h) An npn transistor is used as a CE amplifier and has the collector to base bias arrangement shown below. Given: = 99, VBE = 0.7V, VCC = 12V, RL = 2K and RB = 100K. Find the Q- point analytically and the stability factor S,S and S.
i) For the following types of MOSFETS (i.e DE MOSFET and E MOSFET), discuss their construction, principle of operation and their static characteristics. j) The pinch off voltage of a P channel JFET is V p =5V, and I DSS = -40mA. The drain source voltage V DS is such that a saturated drain current I DS = -15mA is maintained. Find the gate source voltage V GS . (TO BE SUBMITTED ON 12 TH JULY WITHOUT FAIL)