Kancharla, Sravana

Thathapudi , Selina
Performance Evaluation of Cache
Memory
Abstract

Cache Memory plays a vital role in optimizing the performance of a CPU.
Cache enables the processor to perform its duties without having to wait for a long
period for data to arrive from the main memory. This is due to the fact that main
memory does not have the bandwidth capability and is not fast enough to cater to
the needs of the processor. In this project, we study various parameters of Cache.
We run multiple programs and monitor their effects on the Cache and its
parameters. The Cache parameters we will be monitoring are copy read hits
percentage, copy reads/sec, cache bytes, cache faults/sec, page faults/sec, page
reads/sec and page writes/sec. The various scenarios under which we monitor the
Cache are; when no application/program is running, while playing a video file from
main memory, playing a video file from an external memory, running a matrix
multiplication program, read in a large file and lastly, writing data to file.

Introduction

Cache Memory is used in CPUs to hold temporary data [1]. Technology
scaling along with advances in technology has increased the capabilities of CPUs.
CPUs are faster now than they have ever been. In addition, they are now pipelined
in order to handle multiple instructions. To facilitate these CPU we need main
memories with high bandwidth capabilities. However, the performance of memories
has not grown in proportion to that of CPUs [2]. This is where caches come in.

Caches act as a bridge between the fast CPU and the slower main memory.
Caches are expensive high-speed memory units. They store the most commonly
used data, which they get from the main memory. The CPUs, then get their data
from these faster Caches rather than the slower main memory [2]. Due to its high
performance, Cache is expensive and its size is multitudes smaller than that of the
main memory in a system. Owing to its small size, Caches are very carefully
designed in order to optimize their performance.

In our Project, we aim to study the performance of cache parameters. We run
a series of programs and observe how cache parameters such as Cache Hits, Cache
misses and faults are affected. We discuss the effects these programs are expected to
have on these parameters. We then analyze the performance by checking is the
results agree with what is expected.

Processor Details

The results obtained from the analysis will to some extent, rely on the
processor that we use. Therefore, we would like to list down the specifications of the
processor.

1. It is an Intel Core i7-3632QM CPU with a clock speed of 2.2 GHz and a max
Turbo frequency of 3.2GHz.
2. It consists of four threads and eight cores.
3. Has Intel Smart Cache of 6 MB
4. A 64 bit Instruction set
5. Maximum memory Bandwidth of 25.6 GB/s
6. A Hard Disk space of 930 GB.

The Computer we worked on consisted of a Graphics Processor that had the
following specifications:

1. Intel HD Graphics 4000
2. Graphics Base Frequency of 650 MHz with a maximum dynamic Frequency
of 1.15GHz

Windows Performance Monitor

We have used Windows Performance Monitor to monitor various
parameters while performing various operations. This application can be executed
on only Windows computers. Windows Performance counters can be displayed in a
visual manner in real-time or as a log containing historical data. Performance
Counters can be added using Data Collector Sets. Different sub sets of Performance
monitors can be used for various purposes.

In our project, we are monitoring parameters for cache and memory. For
Cache, we are monitoring Copy Read Hits Percentage and Copy Reads/Sec. Copy
Read Hits counter pertains to hit and miss rates. A value more than 80 percent
implies that the cache is being utilized effectively [3]. Copy Reads/Sec displays the
actual number of hits actually occurring while application is running. The counter
displays the total count of all hit and miss copy read calls to cache [3].

For Memory, we are monitoring Cache Bytes, Cache Faults/Sec, Page
Faults/Sec, Page Reads/Sec and Page Writes/Sec. Cache Bytes is the total
number of bytes of cache that is being currently utilized by the application [3].
Cache Faults is the number of cache blocks, which are not present in the cache and
brought from lower memory [3]. Page Faults is the counter that displays the number
of pages brought in from disk [3]. Page Reads and Writes are transactions that are
being performed by the application currently being executed [3].

Below is a screenshot of the parameters we are monitoring for the various
scenarios.


Figure 1. Screenshot of the parameters



Scenarios for Monitoring Performance

Scenario 1 - Control: No Applications Running

The first scenario we are considering is with no user applications running.
The task manager shows all the parameters in the initial situation. The taskbar still
has a few processes executing on the computer. These processes are needed for
initial programs to run. In addition, in order to compare how the other programs
fare, we need a baseline to compare. This acts as the base scenario.

Approach: The computer is started and no programs/applications are run.
Only the Windows Performance Monitor is opened and the processors performance
is monitored for two minutes.



Figure 2. Screenshot of no applications running scenario

Scenario 2 - Playing a Video Located in Main Memory

For the second scenario, we play a video file located in main memory. We are
monitoring performance counters for this scenario in order to compare the
variations of playing a video from system memory and from an external hard drive.
We wanted to know how the performance varies in both scenarios. Therefore, we
monitored the effects on the performance of the cache and memory. Generally, we
experienced a slight difference in performance when a video was being played from
a computer and a hard drive

Approach: A video is placed on the desktop and the computer is restarted.
The video is played and cache and memory usage is monitored using memory and
cache counters present in Windows Performance Monitor.


Figure 3. Screenshot of video running from desktop scenario

Scenario 3 - Playing a Video from an External Memory

As an extension of the previous scenario, we monitored the Performance
Counters while paying a video from external memory. The results are compared to
the previous scenario and analyzed.

Approach: A video is placed on a hard drive and the computer is restarted.
The video is played from the hard drive, and cache and memory usage is monitored
using the same counters present in Windows Performance Monitor.


Figure 4. Screenshot of video running from hard drive scenario

Scenario 4 - Matrix Multiplication Program using Blocking

One of the advanced optimizations for cache memory as discussed in class is
Blocking [4], [5]. This can mainly be used in applications like matrix multiplication
of huge arrays. In this scenario, we have tried to monitor the effectiveness of this
optimization by applying it in the form of a program.

Approach: Two functions are written in Visual Studio(C#) for matrix
multiplication of two arrays with 100 rows and 100 columns. The first function
implements the multiplication in the regular manner. While the second function,
used blocking. The programs are compiled and the computer is restarted. Two
functions are executed separately and their behavior is analyzed using the
performance monitor.

Figure 5. Screenshot of Matrix Multiplication without optimization scenario


Figure 6. Screenshot of Matrix Multiplication with optimization scenario

Scenario 5 - Reading in Data from File

For this scenario, we monitored the behavior of the counters when data is
being read from a file. Reading from files are used commonly in programming for
uploading large amounts of data. We monitored various performance counters for
this scenario.

Approach: A program is written in Visual Studio to read and display a .txt file
of size 2 MB. The program is compiled and the computer is restarted. After restart,
the program is executed and cache and memory usage is monitored for the duration
of execution using Windows Performance Monitor.

Figure 7. Screenshot of Reading from a file scenario

Scenario 6 - Writing Data to a File

For this scenario, we monitored the behavior of the counters when data is
being written to a file. Similar to reading of data, writing is also a common
occurrence in any program. We monitored various performance counters for this
scenario.

Approach: A program is written in Visual Studio to write two pages of text to
a .txt file. The program is compiled and the computer is restarted. After restart, the
program is executed and cache and memory usage is monitored for the duration of
execution using Windows Performance Monitor.


Figure 8. Screenshot of Reading from a file scenario

Analysis of the Scenarios

The performance counters in scenario one display cache and memory usage
while no user programs are being executed. The spikes in the counters is a result of
the resources utilized by processes currently executing.

When the video is playing from the desktop, the entire file is present in the
memory, and the data is being consistently copied from the memory to cache and
being replaced by the video data stream being played. This explains the consistency
of the counters.

In the scenario where video is played from hard drive, the data is copied from the
hard drive to the cache and then played. The copying of the data causes the peaks in
the copy reads/sec, cache faults/sec and Page writes/sec. As a result, it is more
efficient to copy a movie from hard drive to desktop than streaming directly from
external memory.

Even though the concept of Blocking is used for cache optimization, the results of
this scenario supports that it can be quite effective in application layer as well. The
computation not only finished a couple seconds faster, but it also had significantly
reduced number of cache misses and page faults.

For reading from a file, the initial peaks for copy reads and page faults which
implies that the data is being transferred in/out of caches. After that, for the
duration of displaying the read data to the screen, the fluctuations are minimal.

For writing to a file, the peaks are for page writes and copy reads, this implies
that data is put into the cache, read from there and written into the file that is
located in main memory

Conclusion

In this paper, we have monitored the behavior of cache and memory parameters
under various circumstances. We analyzed why these cache and memory counters
were affected in scenarios and how the cache could be effectively utilized by making
minor changes such as running applications from the memory rather than from an
external storage device and using the concept of Blocking. There are a lot of
additional counters and parameters that can be monitored such as the direct effects
on L1, L2 and L3 caches. Further scope includes monitoring the above mentioned
parameters and calculating Average Memory Access Time.

Future Scope and Missed Opportunities

At the outset of the project, we set out to calculate the Average Memory Access
Time (AMAT) for the four scenarios mentioned above and monitor the L1, L2 and L3
caches.

AMAT= Hit time + (Miss Penalty*Miss rate)

The formula above shows how we could calculate AMAT. If we were to try to
equate the formula to the counters were we monitoring, the matching would look
like the following:

Copy Read Hits Percentage would correspond to Miss Rate
Physical Disk\Avg. Disk Sec/Read which is the time it takes to get data from
Disk, would correspond to Miss Penalty.

However, we could not identify a counter in the Windows Performance
Monitor that calculated the amount to time it took to get data from cache.

Initially, we set out to use the performance monitor by Intel called Intel
Performance Counter Monitor. However, we were unable to get the application
installed and running on our computers. We faced quite a few errors which
hindered the installation process. Eventually, in order to get started on the project
and get some results, we decided to use the Windows Performance Monitor. While
the Intel Performance Counter Monitor had counters which would have allowed us
to calculate AMAT, the Windows monitor did not.

Moreover, the Intel Performance Counter Monitor would have allowed to
view the effects on the L1, L2 and L3 cache as we set out to do. It allows us to view
the effects on the cache levels dynamically within a program; which was in line with
what we wanted to do. The Windows monitor however, had no such capability and
this is where we fell short.

For future scope, we would like try again and get the Intel Performance
Counter Monitor running and calculate the AMAT for the 4 scenarios mentioned in
the project. We would also like to capture the values of the L1, L2 and L3 caches in
order to analyze our results better and make our conclusions more meaningful.


References

1. Alan Jay Smith. 1982. Cache Memories. ACM Comput. Surv. 14, 3 (September 1982),
473-530. DOI=10.1145/356887.356892
http://doi.acm.org/10.1145/356887.356892

2. Stacpoole, R.; Jamil, T., "Cache memories," Potentials, IEEE , vol.19, no.2, pp.24,29,
Apr/May 2000
doi: 10.1109/45.839642 keywords: {cache storage;cache memory;ongoing
research;performance;storage system;system processing ability;Cache
storage;Hardware;Registers},
URL:http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=839642&isnumbe
r=18156

3. Evaluating Memory and Cache Usage. Retrieved May 2, 2014, from: Windows Online
Technical Library
http://technet.microsoft.com/en-us/library/cc958286.aspx

4. Ali Pinar and Michael T. Heath. 1999. Improving performance of sparse matrix-
vector multiplication. In Proceedings of the 1999 ACM/IEEE conference on
Supercomputing (SC '99). ACM, New York, NY, USA, , Article 30 .
DOI=10.1145/331532.331562 http://doi.acm.org/10.1145/331532.331562

5. S. Toledo. 1997. Improving the memory-system performance of sparse-matrix
vector multiplication. IBM J. Res. Dev. 41, 6 (November 1997), 711-726.
DOI=10.1147/rd.416.0711 http://dx.doi.org/10.1147/rd.416.071









































Appendix

Below are the lines of code and classes used for the execution of the programs mentioned in
the project. The programs are written in Visual Studio 2013 in C#.

MainClass.cs

using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using System.Threading.Tasks;
using System.Data.OleDb;
using System.Windows.Controls;
using System.IO;

namespace ComputerArchitectureProject
{
class MainClass
{
public static void Main()
{
System.Console.WriteLine("Starting Program!!");

//Call Method to write to file
WriteToFileClass filewrite = new WriteToFileClass();
filewrite.WriteToFileMethod();
System.Console.WriteLine("Write to File Completed!!");

//Call Method to read from file
ReadFromFileClass fileread = new ReadFromFileClass();
fileread.ReadFromFileMethod();
System.Console.WriteLine("Read File Completed!!");

//Call Method to Matrix Multiplication
MatrixMultiplication matmult = new MatrixMultiplication();
matmult.MatrixMultiplicationMethod();
System.Console.WriteLine("Matrix Multiplication Completed!!");

}
}
}

WriteToFileClass

using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using System.Threading.Tasks;
using System.Data.OleDb;
using System.Windows.Controls;
using System.IO;


namespace ComputerArchitectureProject
{
class WriteToFileClass
{
public void WriteToFileMethod()
{
StreamWriter sr = new
StreamWriter("C:\\Users\\Selina\\Documents\\words.txt");

string line =
"Computer technology has made incredible progress in the roughly" +
"60 years since the first general-purpose electronic computer was
created. Today, less than $500" +
"will purchase a personal computer that has more performance, more
main memory," +
"and more disk storage than a computer bought in 1985 for 1 million
dollars." +
"This rapid improvement has come both from advances in the technology
used to" +
"build computers and from innovation in computer design." +
"Although technological improvements have been fairly steady, progress
arising" +
"from better computer architectures has been much less consistent.
During the" +
"first 25 years of electronic computers, both forces made a major
contribution," +
"delivering performance improvement of about 25% per year. The late
1970s saw" +
"the emergence of the microprocessor. The ability of the
microprocessor to ride" +
"the improvements in integrated circuit technology led to a higher
rate of improvement" +
"roughly 35% growth per year in performance." +
"This growth rate, combined with the cost advantages of a mass-
produced" +
"microprocessor, led to an increasing fraction of the computer
business being" +
"based on microprocessors. In addition, two significant changes in the
computer" +
"marketplace made it easier than ever before to be commercially
successful with a" +
"new architecture. First, the virtual elimination of assembly language
programming" +
"reduced the need for object-code compatibility. Second, the creation
of" +
"standardized, vendor-independent operating systems, such as UNIX and
its" +
"clone, Linux, lowered the cost and risk of bringing out a new
architecture." +
"These changes made it possible to develop successfully a new set of
architectures" +
"with simpler instructions, called RISC (Reduced Instruction Set
Computer)" +
"architectures, in the early 1980s. The RISC-based machines focused
the attention" +
"of designers on two critical performance techniques, the exploitation
of" +
"instructionlevel" + "parallelism" +
"(initially through pipelining and later through multiple instruction"
+
"issue) and the use of caches (initially in simple forms and later
using more sophisticated" +
"organizations and optimizations)." +
"The RISC-based computers raised the performance bar, forcing prior
architectures" +
"to keep up or disappear. The Digital Equipment Vax could not, and so
it" +
"was replaced by a RISC architecture. Intel rose to the challenge,
primarily by" +
"translating x86 (or IA-32) instructions into RISC-like instructions
internally," +
"allowing it to adopt many of the innovations first pioneered in the
RISC designs." +
"As transistor counts soared in the late 1990s, the hardware overhead
of translating" +
"the more complex x86 architecture became negligible." +
"Figure 1.1 shows that the combination of architectural and
organizational" +
"enhancements led to 16 years of sustained growth in performance at an
annual" +
"rate of over 50%a rate that is unprecedented in the computer
industry." +
"The effect of this dramatic growth rate in the 20th century has been
twofold." +
"First, it has significantly enhanced the capability available to
computer users. For" +
"many applications, the highest-performance microprocessors of today
outperform" +
"the supercomputer of less than 10 years ago." +
"Computer technology has made incredible progress in the roughly" +
"60 years since the first general-purpose electronic computer was
created. Today, less than $500" +
"will purchase a personal computer that has more performance, more
main memory," +
"and more disk storage than a computer bought in 1985 for 1 million
dollars." +
"This rapid improvement has come both from advances in the technology
used to" +
"build computers and from innovation in computer design." +
"Although technological improvements have been fairly steady, progress
arising" +
"from better computer architectures has been much less consistent.
During the" +
"first 25 years of electronic computers, both forces made a major
contribution," +
"delivering performance improvement of about 25% per year. The late
1970s saw" +
"the emergence of the microprocessor. The ability of the
microprocessor to ride" +
"the improvements in integrated circuit technology led to a higher
rate of improvement" +
"roughly 35% growth per year in performance." +
"This growth rate, combined with the cost advantages of a mass-
produced" +
"microprocessor, led to an increasing fraction of the computer
business being" +
"based on microprocessors. In addition, two significant changes in the
computer" +
"marketplace made it easier than ever before to be commercially
successful with a" +
"new architecture. First, the virtual elimination of assembly language
programming" +
"reduced the need for object-code compatibility. Second, the creation
of" +
"standardized, vendor-independent operating systems, such as UNIX and
its" +
"clone, Linux, lowered the cost and risk of bringing out a new
architecture." +
"These changes made it possible to develop successfully a new set of
architectures" +
"with simpler instructions, called RISC (Reduced Instruction Set
Computer)" +
"architectures, in the early 1980s. The RISC-based machines focused
the attention" +
"of designers on two critical performance techniques, the exploitation
of" +
"instructionlevel" + "parallelism" +
"(initially through pipelining and later through multiple instruction"
+
"issue) and the use of caches (initially in simple forms and later
using more sophisticated" +
"organizations and optimizations)." +
"The RISC-based computers raised the performance bar, forcing prior
architectures" +
"to keep up or disappear. The Digital Equipment Vax could not, and so
it" +
"was replaced by a RISC architecture. Intel rose to the challenge,
primarily by" +
"translating x86 (or IA-32) instructions into RISC-like instructions
internally," +
"allowing it to adopt many of the innovations first pioneered in the
RISC designs." +
"As transistor counts soared in the late 1990s, the hardware overhead
of translating" +
"the more complex x86 architecture became negligible." +
"Figure 1.1 shows that the combination of architectural and
organizational" +
"enhancements led to 16 years of sustained growth in performance at an
annual" +
"rate of over 50%a rate that is unprecedented in the computer
industry." +
"The effect of this dramatic growth rate in the 20th century has been
twofold." +
"First, it has significantly enhanced the capability available to
computer users. For" +
"many applications, the highest-performance microprocessors of today
outperform" +
"the supercomputer of less than 10 years ago." +
"Computer technology has made incredible progress in the roughly" +
"60 years since the first general-purpose electronic computer was
created. Today, less than $500" +
"will purchase a personal computer that has more performance, more
main memory," +
"and more disk storage than a computer bought in 1985 for 1 million
dollars." +
"This rapid improvement has come both from advances in the technology
used to" +
"build computers and from innovation in computer design." +
"Although technological improvements have been fairly steady, progress
arising" +
"from better computer architectures has been much less consistent.
During the" +
"first 25 years of electronic computers, both forces made a major
contribution," +
"delivering performance improvement of about 25% per year. The late
1970s saw" +
"the emergence of the microprocessor. The ability of the
microprocessor to ride" +
"the improvements in integrated circuit technology led to a higher
rate of improvement" +
"roughly 35% growth per year in performance." +
"This growth rate, combined with the cost advantages of a mass-
produced" +
"microprocessor, led to an increasing fraction of the computer
business being" +
"based on microprocessors. In addition, two significant changes in the
computer" +
"marketplace made it easier than ever before to be commercially
successful with a" +
"new architecture. First, the virtual elimination of assembly language
programming" +
"reduced the need for object-code compatibility. Second, the creation
of" +
"standardized, vendor-independent operating systems, such as UNIX and
its" +
"clone, Linux, lowered the cost and risk of bringing out a new
architecture." +
"These changes made it possible to develop successfully a new set of
architectures" +
"with simpler instructions, called RISC (Reduced Instruction Set
Computer)" +
"architectures, in the early 1980s. The RISC-based machines focused
the attention" +
"of designers on two critical performance techniques, the exploitation
of" +
"instructionlevel" + "parallelism" +
"(initially through pipelining and later through multiple instruction"
+
"issue) and the use of caches (initially in simple forms and later
using more sophisticated" +
"organizations and optimizations)." +
"The RISC-based computers raised the performance bar, forcing prior
architectures" +
"to keep up or disappear. The Digital Equipment Vax could not, and so
it" +
"was replaced by a RISC architecture. Intel rose to the challenge,
primarily by" +
"translating x86 (or IA-32) instructions into RISC-like instructions
internally," +
"allowing it to adopt many of the innovations first pioneered in the
RISC designs." +
"As transistor counts soared in the late 1990s, the hardware overhead
of translating" +
"the more complex x86 architecture became negligible." +
"Figure 1.1 shows that the combination of architectural and
organizational" +
"enhancements led to 16 years of sustained growth in performance at an
annual" +
"rate of over 50%a rate that is unprecedented in the computer
industry." +
"The effect of this dramatic growth rate in the 20th century has been
twofold." +
"First, it has significantly enhanced the capability available to
computer users. For" +
"many applications, the highest-performance microprocessors of today
outperform" +
"the supercomputer of less than 10 years ago." +
"Computer technology has made incredible progress in the roughly" +
"60 years since the first general-purpose electronic computer was
created. Today, less than $500" +
"will purchase a personal computer that has more performance, more
main memory," +
"and more disk storage than a computer bought in 1985 for 1 million
dollars." +
"This rapid improvement has come both from advances in the technology
used to" +
"build computers and from innovation in computer design." +
"Although technological improvements have been fairly steady, progress
arising" +
"from better computer architectures has been much less consistent.
During the" +
"first 25 years of electronic computers, both forces made a major
contribution," +
"delivering performance improvement of about 25% per year. The late
1970s saw" +
"the emergence of the microprocessor. The ability of the
microprocessor to ride" +
"the improvements in integrated circuit technology led to a higher
rate of improvement" +
"roughly 35% growth per year in performance." +
"This growth rate, combined with the cost advantages of a mass-
produced" +
"microprocessor, led to an increasing fraction of the computer
business being" +
"based on microprocessors. In addition, two significant changes in the
computer" +
"marketplace made it easier than ever before to be commercially
successful with a" +
"new architecture. First, the virtual elimination of assembly language
programming" +
"reduced the need for object-code compatibility. Second, the creation
of" +
"standardized, vendor-independent operating systems, such as UNIX and
its" +
"clone, Linux, lowered the cost and risk of bringing out a new
architecture." +
"These changes made it possible to develop successfully a new set of
architectures" +
"with simpler instructions, called RISC (Reduced Instruction Set
Computer)" +
"architectures, in the early 1980s. The RISC-based machines focused
the attention" +
"of designers on two critical performance techniques, the exploitation
of" +
"instructionlevel" + "parallelism" +
"(initially through pipelining and later through multiple instruction"
+
"issue) and the use of caches (initially in simple forms and later
using more sophisticated" +
"organizations and optimizations)." +
"The RISC-based computers raised the performance bar, forcing prior
architectures" +
"to keep up or disappear. The Digital Equipment Vax could not, and so
it" +
"was replaced by a RISC architecture. Intel rose to the challenge,
primarily by" +
"translating x86 (or IA-32) instructions into RISC-like instructions
internally," +
"allowing it to adopt many of the innovations first pioneered in the
RISC designs." +
"As transistor counts soared in the late 1990s, the hardware overhead
of translating" +
"the more complex x86 architecture became negligible." +
"Figure 1.1 shows that the combination of architectural and
organizational" +
"enhancements led to 16 years of sustained growth in performance at an
annual" +
"rate of over 50%a rate that is unprecedented in the computer
industry." +
"The effect of this dramatic growth rate in the 20th century has been
twofold." +
"First, it has significantly enhanced the capability available to
computer users. For" +
"many applications, the highest-performance microprocessors of today
outperform" +
"the supercomputer of less than 10 years ago.";
sr.Write(line);

sr.Close();
Console.ReadLine();
}
}
}

ReadFromFileClass

using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using System.Threading.Tasks;
using System.Data.OleDb;
using System.Windows.Controls;
using System.IO;


namespace ComputerArchitectureProject
{
class ReadFromFileClass
{
public void ReadFromFileMethod()
{
StreamReader sr = new
StreamReader("C:\\Users\\Selina\\Documents\\words.txt");

string line = sr.ReadLine();

while (line != null)
{
Console.WriteLine(line);
line = sr.ReadLine();
}
sr.Close();
Console.ReadLine();
}
}
}

MatrixMultiplication.cs

using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using System.Threading.Tasks;
using System.Data.OleDb;
using System.Windows.Controls;
using System.IO;
using System.Windows.Media;

namespace ComputerArchitectureProject
{
class MatrixMultiplication
{
public int matrixSize = 100;
public void MatrixMultiplicationMethod()
{
int[,] aMatrix = new int[matrixSize, matrixSize];
int[,] bMatrix = new int[matrixSize, matrixSize];

for (int i = 0; i < matrixSize; i++)
for (int j = 0; j < matrixSize; j++)
{
aMatrix[i, j] = (i * j);
bMatrix[i, j] = (i * j) * 2;
}

MultiplyRegular(aMatrix, bMatrix);
MultiplyOptimized(aMatrix, bMatrix);
}

public void MultiplyRegular(int[,] aMat, int[,] bMat)
{
int[,] ResultMatrix = new int[matrixSize, matrixSize];
int result = 0;

for (int rows = 0; rows < matrixSize; rows++)
for (int cols = 0; cols < matrixSize; cols++)
{
result = 0;
for (int k = 0; k < matrixSize; k++)
result += aMat[rows, k] + bMat[k, cols];
ResultMatrix[rows, cols] = result;
}

for (int i = 0; i < matrixSize; i++)
{
for (int j = 0; j < matrixSize; j++)
{
Console.Write(ResultMatrix[i, j]);
Console.Write("\t");
}
Console.WriteLine("\n");
}
Console.WriteLine("Done!!\n");
}

public void MultiplyOptimized(int[,] aMat, int[,] bMat)
{
int[,] ResultMatrix = new int[matrixSize, matrixSize];
int result = 0;
int BlockingFactor = 10;

for (int jj = 0; jj < matrixSize; jj += BlockingFactor)
{
for (int kk = 0; kk < matrixSize; kk += BlockingFactor)
{
for (int rows = 0; rows < matrixSize; rows++)
{
for (int cols = 0; cols < ((jj + BlockingFactor) <
matrixSize ? jj + BlockingFactor : matrixSize); cols++)
{
result = 0;
for (int k = kk; k < ((kk + BlockingFactor) <
matrixSize ? kk + BlockingFactor : matrixSize); k++)
result += aMat[rows, k] * bMat[k, cols];
ResultMatrix[rows, cols] += result;
}
}
}
}

for (int i = 0; i < matrixSize; i++)
{
for (int j = 0; j < matrixSize; j++)
{
Console.Write(ResultMatrix[i, j]);
Console.Write("\t");
}
Console.WriteLine("\n");
}
Console.WriteLine("Done!!\n");


}
}
}