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Lab Nº1 PDS

This document contains MATLAB code to graph functions using the filter function for values of a equal to 0.95 and -0.8. It also contains Simulink models to graph the same functions. Additionally, it includes VHDL code for a timer circuit with 4 different time settings selected by a 2-bit switch.

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Edgar Bm
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27 views6 pages

Lab Nº1 PDS

This document contains MATLAB code to graph functions using the filter function for values of a equal to 0.95 and -0.8. It also contains Simulink models to graph the same functions. Additionally, it includes VHDL code for a timer circuit with 4 different time settings selected by a 2-bit switch.

Uploaded by

Edgar Bm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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MATLAB
GRAFICAR AL FUNCION


clear
clc
a=0.95;
X=ones(1,100);
A=a/(a-1);
B=1/(1-a);
for i=1:100
y(i)=B*X(i)+A*a^i*X(i);
stem(y)
end

Usando al funcin filter para a =0.95
clc;
clear;
a=.95;
num =[ 1 ];
den=[ 1 -a];
n=0:99;
H=ones(1,100);
M=filter(num,den,H);
stem(n,M);




















Usando al funcin filter para a =-0.8

clc;
clear;
a=-0.8;
num =[ 1 ];
den=[ 1 -a];
n=0:99;
H=ones(1,100);
M=filter(num,den,H);
stem(n,M);









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Usando el simulink
Para a=0.95




Para a =-0.8



TEMPORIZADOR

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity temporizador is
port( clk,rst: in std_logic;
sel: in bit_vector(1 downto 0);
tm : out std_logic);
end entity;

architecture comportamiento of temporizador is
signal tm1,tm2,tm3,tm4:std_logic;
begin
process (rst, clk)
variable temp: integer range 0 to 50000;
begin
if (rst='1') then
tm1 <= '0';
elsif (rising_edge(clk)) then
temp := temp + 1;
if (temp=50000) then
tm1 <= '1';
temp := 0;
else
tm1 <= '0';
end if;
end if;
end process;

process (rst, clk)
variable temp: integer range 0 to 12500;
begin
if (rst='1') then
tm2 <= '0';
elsif (rising_edge(clk)) then
temp := temp + 1;
if (temp=12500) then
tm2 <= '1';
temp := 0;
else
tm2 <= '0';
end if;
end if;
end process;

process (rst, clk)
variable temp: integer range 0 to 6250;
begin
if (rst='1') then
tm3 <= '0';
elsif (rising_edge(clk)) then
temp := temp + 1;
if (temp=6250) then
tm3 <= '1';
temp := 0;
else
tm3 <= '0';
end if;
end if;
end process;

process (rst, clk)
variable temp: integer range 0 to 3125;
begin
if (rst='1') then
tm4 <= '0';
elsif (rising_edge(clk)) then
temp := temp + 1;
if (temp=3125) then
tm4 <= '1';
temp := 0;
else
tm4 <= '0';
end if;
end if;
end process;

process (tm1, tm2, tm3, tm4,sel)
begin
case sel is
when "00" => tm <= tm1;
when "01" => tm <= tm2;
when "10" => tm <= tm3;
when "11" => tm <= tm4;
end case;
end process;



end comportamiento;

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