1 CMF20120D Rev.

D
CMF20120D-Silicon Carbide Power MOSFET
Z-FET
TM
MOSFET
N-Channel Enhancement Mode
Features
High Speed Switching with Low Capacitances
High Blocking Voltage with Low R
DS(on)
Easy to Parallel and Simple to Drive
Avalanche Ruggedness
Resistant to Latch-Up
Halogen Free, RoHS Compliant
Benefts
Higher System Effciency
Reduced Cooling Requirements
Increased System Switching Frequency
Applications
Solar Inverters
High Voltage DC/DC Converters
Motor Drives
Switch Mode Power Supplies
UPS
Package
TO-247-3
Part Number Package
CMF20120D TO-247-3
V
DS
1200 V
I
D(MAX)
42 A
R
DS(on)
80m
Maximum Ratings (T
C
= 25C unless otherwise specifed)
Symbol Parameter Value Unit Test Conditions Note
I
D
Continuous Drain Current
42
A
V
GS
@20V, T
C
= 25C Fig. 10
24 V
GS
@20V, T
C
= 100C
I
Dpulse
Pulsed Drain Current 90 A
Pulse width t
P
limited by T
jmax
T
C
= 25C
E
AS
Single Pulse Avalanche Energy 2.2 J
I
D
= 20A, V
DD
= 50 V,
L = 9.5 mH
Fig. 15
E
AR
Repetitive Avalanche Energy 1.5 J t
AR
limited by T
jmax
I
AR
Repetitive Avalanche Current 20 A
I
D
= 20A, V
DD
= 50 V, L = 3 mH
t
AR
limited by Tjmax
V
GS
Gate Source Voltage -5/+25 V
P
tot
Power Dissipation 215 W T
C
=25C Fig. 9
T
J
, T
stg
Operating Junction and Storage Temperature
-55 to
+135
C
T
L
Solder Temperature 260 C 1.6mm (0.063) from case for 10s
M
d
Mounting Torque
1
8.8
Nm
lbf-in
M3 or 6-32 screw
2 CMF20120D Rev.

D
Electrical Characteristics (T
C
= 25C unless otherwise specifed)
Symbol Parameter Min. Typ. Max. Unit Test Conditions Note
V(BR)DSS Drain-Source Breakdown Voltage 1200 V VGS =

0V, ID = 100A
VGS(th)
Gate Threshold Voltage
2.65 4
V
VDS = VGS, ID = 1mA
Fig. 11
3.2 4.8 VDS = VGS, ID = 10mA
2.0
V
VDS = VGS, ID = 1mA, TJ = 135C
2.45 VDS = VGS, ID = 10mA, TJ = 135C
IDSS Zero Gate Voltage Drain Current
1 100
A
VDS = 1200V, VGS = 0V
10 250 VDS = 1200V, VGS = 0V, TJ = 135C
IGSS Gate-Source Leakage Current 0.25 A VGS = 20V, VDS = 0V
R
DS(on)
Drain-Source On-State Resistance
80 100
m
VGS = 20V, ID = 20A
Fig. 3
95 120 VGS = 20V, ID = 20A, TJ = 135C
gfs Transconductance
7.9
S
VDS=

20V, IDS=

20A
Fig. 6
7.4 VDS=

20V, IDS=

20A, TJ = 135C
Ciss Input Capacitance 1915
pF
VGS = 0V
VDS = 800V
f = 1MHz
VAC = 25mV
Fig. 13 Coss Output Capacitance 120
Crss Reverse Transfer Capacitance 13
Eoss Coss Stored Energy 62 J Fig. 14
td(on)v Turn-On Delay Time 13
ns
VDD = 800V, VGS = 0/20V
ID = 20A
RG(ext) = 2.5, R
L
= 40
Timing relative to V
DS

Fig. 17
tfv Fall Time 24
td(off)v Turn-Off Delay Time 40
trv Rise Time 38
RG Internal Gate Resistance 5 f = 1MHz, VAC

=

25mV
Built-in SiC Body Diode Characteristics
Symbol Parameter Typ. Max. Unit Test Conditions Note
VSD Diode Forward Voltage
3.5
V
VGS = -5V, IF
=10A, TJ = 25C
3.1 VGS = -2V, IF
=10A, TJ = 25C
trr Reverse Recovery Time 220 ns
VGS = -5V, IF
=20A, TJ = 25C
VR = 800V,
diF/dt= 100A/s
Fig. 22 Qrr Reverse Recovery Charge 142 nC
Irrm Peak Reverse Recovery Current 2.3 A
Thermal Characteristics
Symbol Parameter Typ. Max. Unit Test Conditions Note
RJC Thermal Resistance from Junction to Case 0.44 0.51
K/W Fig. 7
RCS Case to Sink, w/ Thermal Compound 0.25
RJA Thermal Resistance From Junction to Ambient 40
Gate Charge Characteristics
Symbol Parameter Typ. Max. Unit Test Conditions Note
Qgs Gate to Source Charge 23.8
nC
VDD = 800V, VGS = 0/20V
ID =20A
Per JEDEC24 pg 27
Fig.
12
Qgd Gate to Drain Charge 43.1
Qg Gate Charge Total 90.8
3 CMF20120D Rev.

D
0
50
100
150
200
250
0 10 20 30 40 50 60 70 80 90 100
R
D
S
(
o
n
)
(
m

)
I
D
(A)
V
GS
= 20 V
135
o
C
25
o
C
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0 25 50 75 100 125 150
N
o
r
m
a
l
i
z
e
d
R
D
S
(
o
n
)
T
J
(
o
C)
V
GS
= 20 V
0
20
40
60
80
100
120
0 1 2 3 4 5 6 7 8 9 10 11 12
I
D
(
A
)
V
DS
(V)
0
10
20
30
40
50
60
70
80
90
100
0 2 4 6 8 10 12 14 16 18 20
I
D
(
A
)
V
DS
(V)
Figure 2. Typical Output Characteristics TJ = 135C
Typical Performance
Figure 4. On-Resistance vs. Drain Current
Figure 6. Typical Transfer Characteristics
Figure 1. Typical Output Characteristics TJ = 25C
Figure 3. Normalized On-Resistance vs. Temperature
0
100
200
300
400
500
600
700
800
10 12 14 16 18 20
R
D
S
(
o
n
)
(
m

)
V
GS
(V)
I
D
= 20 A
25
o
C
135
o
C
0
10
20
30
40
50
0 2 4 6 8 10 12 14 16 18 20
I
D
(
A
)
V
GS
(V)
25
o
C
135
o
C
Figure 5. On-Resistance vs. Gate Voltage
4 CMF20120D Rev.

D
Typical Performance
Figure 8. Safe Operating Area
Figure 11. Gate Threshold Voltage vs.
Temperature
Figure 9. Power Dissipation Derating Curve
100E-6
1E-3
10E-3
100E-3
1
1E-6 10E-6 100E-6 1E-3 10E-3 100E-3 1
Z
t
h
J
C
(
o
C
/
W
)
t
p
(s)
0.5
0.3
0.1
0.05
0.02
0.01
SinglePulse
DC:
0.1
1
10
100
1 10 100 1000
I
D
(
A
)
V
DS
(V)
Limited
by R
DS(on)
DC
t
p
1 s
t
p
= 10 s
t
p
= 100 s
t
p
= 1 ms
t
p
= 10 ms
0
50
100
150
200
250
0 25 50 75 100 125 150
P
D
(
W
)
T
C
(
o
C)
0
5
10
15
20
25
30
35
40
45
0 25 50 75 100 125 150
I
D
(
A
)
T
C
(
o
C)
Figure 7. Transient Thermal Impedance (Junction - Case)
with Duty Cycle
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
-75 -50 -25 0 25 50 75 100 125 150
V
G
S
(
t
h
)
(
V
)
T
J
(
o
C)
I
D
= 1 mA
I
D
= 10 mA
Figure 10. Continuous Current Derating Curve
-5
0
5
10
15
20
25
0 20 40 60 80 100
V
G
S
(
V
)
Gate Charge (nC)
I
D
= 20 A
V
DD
= 800 V
Figure 12. Typical Gate Charge Characteristics
(25C)
5 CMF20120D Rev.

D
Typical Performance
Figure 13A and 13B. Typical Capacitances vs. Drain Voltage at V
GS
= 0V and f = 1 MHz
Figure 16. Resistive Switching Times vs.
External R
G
at V
DD
= 400V, I
D
= 20A
Figure 14. Typical C
OSS
Stored Energy
10
100
1000
10000
0 20 40 60 80 100 120 140 160 180 200
C
a
p
a
c
i
t
a
n
c
e

(
p
F
)
V
DS
(V)
C
iss
C
oss
C
rss
10
100
1000
10000
0 100 200 300 400 500 600 700 800
C
a
p
a
c
i
t
a
n
c
e

(
p
F
)
V
DS
(V)
C
iss
C
oss
C
rss
0
10
20
30
40
50
60
70
0 100 200 300 400 500 600 700 800
E
o
s
s
(

J
)
V
DS
(V)
0
500
1000
1500
2000
2500
0
5
10
15
20
25
0 0.001 0.002 0.003 0.004 0.005 0.006
V
D
S
(
V
)
I
D
S
(
A
)
Time (s)
E
AS
= 2.20 J
I
DS
V
DS
0
20
40
60
80
100
120
140
0 5 10 15 20 25
T
i
m
e

(
n
s
e
c
)
External Gate Resistor ()
t
D(on)v
t
fv
t
rv
t
D(off)v
V
GS
= 0/20V
V
DD
= 400V
R
L
= 20
I
D
= 20 A
T
A
= 25
o
C
Figure 15. Typical Unclamped Inductive Switching
Waveforms Showing Avalanche Capability
0
20
40
60
80
100
120
140
0 5 10 15 20 25
T
i
m
e

(
n
s
e
c
)
External Gate Resistor ()
t
D(on)v
t
fv
t
rv
t
D(off)v
V
GS
= 0/20V
V
DD
= 800V
R
L
= 40
I
D
= 20 A
T
A
= 25
o
C
Figure 17. Resistive Switching Times vs.
External R
G
at V
DD
= 800V, I
D
= 20A
6 CMF20120D Rev.

D
Typical Performance
Figure 20. Clamped Inductive Switching Waveform Test
Circuit
0
100
200
300
400
500
600
700
0 5 10 15 20
S
w
i
t
c
h
i
n
g

E
n
e
r
g
y

(

J
)
Peak Drain Current (A)
E
TOT,SW
E
OFF
E
ON
V
GS
= 0/20V
R
G
= 7.5 Tot
V
DD
= 800V
L = 856 H
FWD: C4D10120
T
A
= 25
o
C
0
100
200
300
400
500
600
700
800
900
1,000
0 25 50 75 100 125 150
S
w
i
t
c
h
i
n
g

E
n
e
r
g
y

(

J
)
T
J
(
o
C)
E
TOT,SW
E
ON
E
OFF
V
GS
= 0/20V
R
G
= 11.8 Tot
V
DD
= 800V
L = 856 H
FWD: C4D10120
I
D
= 20 A
Figure 21. Switching Test Waveforms for Transition times
Figure 18. Clamped Inductive Switching Energy vs.
Drain Current (Fig. 20)
Figure 19. Clamped Inductive Switching Energy vs.
Junction Temperature (Fig 20)
800V
+
-
42.3f
856H
CMF20120D
C4D10120D
10A, 1200V
SiC Schottky
90%
10%
V
DS
V
GS
t
on
t
off
t
fv
t
d(on)v
t
d(off)v
t
rv
7 CMF20120D Rev.

D
10% Irr
Vcc
t
rr
Irr
Ic
Vpk
tx
10% Vcc
Qrr=

trr
id dt
tx
Diode Reverse
Recovery Energy
Diode Recovery
Waveforms
Erec=

t2
id dt
t1
t1 t2
Test Circuit Diagrams and Waveforms
Fig 22. Body Diode Recovery Test
800V
42.3f
856H
CMF20120D
CMF20120D
+
-
Fig 23. Body Diode Recovery Waveform
FOR OFFICIAL USE ONLY Not Cleared for Open Release
FOR OFFICIAL USE ONLY Not Cleared for Open Release
E
A
= 1/2L x I
D
2
Fig 24. Unclamped Inductive Switching Test Circuit
Fig 25. Unclamped Inductive Switching waveform
for Avalanche Energy
ESD Test Total Devices Sampled Resulting Classifcation
ESD-HBM All Devices Passed 1000V 2 (>2000V)
ESD-MM All Devices Passed 400V C (>400V)
ESD-CDM All Devices Passed 1000V IV (>1000V)
ESD Ratings
8
This product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body
nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited
to equipment used in the operation of nuclear facilities, life-support machines, cardiac defbrillators or similar emergency medical
equipment, aircraft navigation or communication or control systems, air traffc control systems, or weapons systems.
Copyright 2012 Cree, Inc. All rights reserved. The information in this document is subject to change without notice. Cree and the
Cree logo are registered trademarks and Z-REC and Z-FET are trademarks of Cree, Inc.
8 CMF20120D Rev.

D
Cree, Inc.
4600 Silicon Drive
Durham, NC 27703
USA Tel: +1.919.313.5300
Fax: +1.919.313.5451
www.cree.com/power
Package Dimensions
Package TO-247-3
Recommended Solder Pad Layout
TO-247-3
(1)
(2)
(3)
POS
Inches Millimeters
Min Max Min Max
A .190 .205 4.83 5.21
A1 .090 .100 2.29 2.54
A2 .075 .085 1.91 2.16
b .042 .052 1.07 1.33
b1 .075 .095 1.91 2.41
b2 .075 .085 1.91 2.16
b3 .113 .133 2.87 3.38
b4 .113 .123 2.87 3.13
c .022 .027 0.55 0.68
D .819 .831 20.80 21.10
D1 .640 .695 16.25 17.65
D2 .037 .049 0.95 1.25
E .620 .635 15.75 16.13
E1 .516 .557 13.10 14.15
E2 .145 .201 3.68 5.10
E3 .039 .075 1.00 1.90
E4 .487 .529 12.38 13.43
e .214 BSC 5.44 BSC
N 3 3
L .780 .800 19.81 20.32
L1 .161 .173 4.10 4.40
P .138 .144 3.51 3.65
Q .216 .236 5.49 6.00
S .238 .248 6.04 6.30
Part Number Package Marking
CMF20120D TO-247-3 CMF20120