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8086 Instruction Set

copyright © 2005 emu8086.com all rights reserved.

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0% found this document useful (0 votes)
3K views50 pages

8086 Instruction Set

copyright © 2005 emu8086.com all rights reserved.

Uploaded by

ysoyso
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Complete 8086 instruction set

Quick reference:

CMPSB MOV
AAA CMPSW JAE JNBE JPO MOVSB RCR SCASB
AAD CWD JB JNC JS MOVSW REP SCASW
AAM DAA JBE JNE JZ MUL REPE SHL
AAS DAS JC JNG LAHF NEG REPNE SHR
ADC DEC JCXZ JNGE LDS NOP REPNZ STC
ADD DIV JE JNL LEA NOT REPZ STD
AND HLT JG JNLE LES OR RET STI
CALL IDIV JGE JNO LODSB OUT RETF STOSB
CBW IMUL JL JNP LODSW POP ROL STOSW
CLC IN JLE JNS LOOP POPA ROR SUB
CLD INC JMP JNZ LOOPE POPF SAHF TEST
CLI INT JNA JO LOOPNE PUSH SAL XCHG
CMC INTO JNAE JP LOOPNZ PUSHA SAR XLATB
CMP IRET JNB JPE LOOPZ PUSHF SBB XOR
JA RCL

Operand types:

REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH, DL, DI, SI, BP, SP.

SREG: DS, ES, SS, and only as second operand: CS.

memory: [BX], [BX+SI+7], variable, etc...(see Memory Access).

immediate: 5, -24, 3Fh, 10001101b, etc...

Notes:

 When two operands are required for an instruction they are separated
by comma. For example:

REG, memory

 When there are two operands, both operands must have the same size
(except shift and rotate instructions). For example:

1
AL, DL
DX, AX
m1 DB ?
AL, m1
m2 DW ?
AX, m2
 Some instructions allow several operand combinations. For example:

memory, immediate
REG, immediate

memory, REG
REG, SREG
 Some examples contain macros, so it is advisable to use Shift + F8
hot key to Step Over (to make macro code execute at maximum speed
set step delay to zero), otherwise emulator will step through each
instruction of a macro. Here is an example that uses PRINTN macro:



 include 'emu8086.inc'
 ORG 100h
 MOV AL, 1
 MOV BL, 2
 PRINTN 'Hello World!' ; macro.
 MOV CL, 3
 PRINTN 'Welcome!' ; macro.
RET

These marks are used to show the state of the flags:

1 - instruction sets this flag to 1.


0 - instruction sets this flag to 0.
r - flag value depends on result of the instruction.
? - flag value is undefined (maybe 1 or 0).

Some instructions generate exactly the same machine code, so


disassembler may have a problem decoding to your original code.
This is especially important for Conditional Jump instructions (see

2
"Program Flow Control" in Tutorials for more information).

Instructions in alphabetical order:

Instruction Operands Description  

ASCII Adjust after Addition.


Corrects result in AH and AL after addition when working
with BCD values.

It works according to the following Algorithm:

if low nibble of AL > 9 or AF = 1 then:


 AL = AL + 6
 AH = AH + 1
 AF = 1
 CF = 1

No else
AAA
operands  AF = 0
 CF = 0

in both cases:
clear the high nibble of AL.

Example:
MOV AX, 15 ; AH = 00, AL = 0Fh
AAA ; AH = 01, AL = 05
RET
C Z S O PA
r ? ? ? ? r
 

AAD No ASCII Adjust before Division.


operands Prepares two BCD values for division.

Algorithm:

 AL = (AH * 10) + AL
 AH = 0

Example:
MOV AX, 0105h ; AH = 01, AL = 05
AAD ; AH = 00, AL = 0Fh (15)
RET

3
C Z S O PA
? r r ? r ?
 

ASCII Adjust after Multiplication.


Corrects the result of multiplication of two BCD values.

Algorithm:

 AH = AL / 10
 AL = remainder
No
AAM
operands
Example:
MOV AL, 15 ; AL = 0Fh
AAM ; AH = 01, AL = 05
RET
C Z S O P A
? r r ? r ?
 

ASCII Adjust after Subtraction.


Corrects result in AH and AL after subtraction when working
with BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:


 AL = AL - 6
 AH = AH - 1
 AF = 1
 CF = 1

No else
AAS
operands  AF = 0
 CF = 0

in both cases:
clear the high nibble of AL.

Example:
MOV AX, 02FFh ; AH = 02, AL = 0FFh
AAS ; AH = 01, AL = 09
RET
C Z S O PA
r ? ? ? ? r
 

ADC REG, memory Add with Carry.

4
Algorithm:

memory, REG operand1 = operand1 + operand2 + CF


REG, REG
memory, Example:
immediate STC ; set CF = 1
REG, MOV AL, 5 ; AL = 5
immediate ADC AL, 1 ; AL = 7
RET
C Z S O PA
r r r r r r
 

Add.

Algorithm:
REG, memory
memory, REG operand1 = operand1 + operand2
REG, REG
ADD memory, Example:
immediate MOV AL, 5 ; AL = 5
REG, ADD AL, -3 ; AL = 2
immediate RET
C Z S O P A
r r r r r r
 

Logical AND between all bits of two operands. Result is


stored in operand1.

These rules apply:

1 AND 1 = 1
REG, memory 1 AND 0 = 0
memory, REG 0 AND 1 = 0
REG, REG 0 AND 0 = 0
AND memory,
immediate
REG,
Example:
immediate
MOV AL, 'a' ; AL = 01100001b
AND AL, 11011111b ; AL = 01000001b ('A')
RET
C Z S O P
0 r r 0 r
 

CALL procedure Transfers control to procedure, return address is (IP) is

5
pushed to stack. 4-byte address may be entered in this
form: 1234h:5678h, first value is a segment second value is an
offset (this is a far call, so CS is also pushed to stack).

Example:

ORG 100h ; directive to make simple .com file.

name CALL p1
label
4-byte address ADD AX, 1

RET ; return to OS.

p1 PROC ; procedure declaration.


MOV AX, 1234h
RET ; return to caller.
p1 ENDP
C Z S O PA
unchanged
 

Convert byte into word.

Algorithm:

if high bit of AL = 1 then:


 AH = 255 (0FFh)

else
No  AH = 0
CBW
operands

Example:
MOV AX, 0 ; AH = 0, AL = 0
MOV AL, -5 ; AX = 000FBh (251)
CBW ; AX = 0FFFBh (-5)
RET
C Z S O PA
unchanged
 

CLC No Clear Carry flag.


operands
Algorithm:

CF = 0

6
0
 

Clear Direction flag. SI and DI will be incremented by chain instructions:


CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB,
STOSW.

Algorithm:
No
CLD
operands DF = 0

D
0
 

Clear Interrupt enable flag. This disables hardware interrupts.

Algorithm:

No IF = 0
CLI
operands
I
0
 

Complement Carry flag. Inverts value of CF.

Algorithm:

if CF = 1 then CF = 0
No if CF = 0 then CF = 1
CMC
operands

C
r
 

CMP REG, memory Compare.


memory, REG
REG, REG Algorithm:
memory,
immediate operand1 - operand2
REG,
immediate result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF, CF)
according to result.

Example:
MOV AL, 5
MOV BL, 5

7
CMP AL, BL ; AL = 5, ZF = 1 (so equal!)
RET
C Z S O PA
r r r r r r
 

Compare bytes: ES:[DI] from DS:[SI].

Algorithm:

 DS:[SI] - ES:[DI]
 set flags according to result:
OF, SF, ZF, AF, PF, CF
 if DF = 0 then
o SI = SI + 1
o DI = DI + 1
No
CMPSB else
operands

o SI = SI - 1
o DI = DI - 1

Example:
see cmpsb.asm in c:\emu8086\examples\.

C Z S O PA
r r r r r r
 

Compare words: ES:[DI] from DS:[SI].

Algorithm:

 DS:[SI] - ES:[DI]
 set flags according to result:
OF, SF, ZF, AF, PF, CF
 if DF = 0 then
o SI = SI + 2
No o DI = DI + 2
CMPSW
operands
else

o SI = SI - 2
o DI = DI - 2

Example:
see cmpsw.asm in c:\emu8086\examples\.

C Z S O PA

8
r r r r r r
 

Convert Word to Double word.

Algorithm:

if high bit of AX = 1 then:


 DX = 65535 (0FFFFh)

else
 DX = 0
No
CWD
operands
Example:
MOV DX, 0 ; DX = 0
MOV AX, 0 ; AX = 0
MOV AX, -5 ; DX AX = 00000h:0FFFBh
CWD ; DX AX = 0FFFFh:0FFFBh
RET
C Z S O PA
unchanged
 

Decimal adjust After Addition.


Corrects the result of addition of two packed BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:


 AL = AL + 6
 AF = 1

if AL > 9Fh or CF = 1 then:


No  AL = AL + 60h
DAA
operands  CF = 1

Example:
MOV AL, 0Fh ; AL = 0Fh (15)
DAA ; AL = 15h
RET
C Z S O PA
r r r r r r
 

DAS No Decimal adjust After Subtraction.


operands Corrects the result of subtraction of two packed BCD values.

9
Algorithm:

if low nibble of AL > 9 or AF = 1 then:


 AL = AL - 6
 AF = 1

if AL > 9Fh or CF = 1 then:


 AL = AL - 60h
 CF = 1

Example:
MOV AL, 0FFh ; AL = 0FFh (-1)
DAS ; AL = 99h, CF = 1
RET
C Z S O PA
r r r r r r
 

Decrement.

Algorithm:

operand = operand - 1
REG
DEC memory Example:
MOV AL, 255 ; AL = 0FFh (255 or -1)
DEC AL ; AL = 0FEh (254 or -2)
RET
Z S O PA
r r r r r
CF - unchanged!  

DIV REG Unsigned divide.


memory
Algorithm:

when operand is a byte:


AL = AX / operand
AH = remainder (modulus)
when operand is a word:
AX = (DX AX) / operand
DX = remainder (modulus)
Example:
MOV AX, 203 ; AX = 00CBh
MOV BL, 4
DIV BL ; AL = 50 (32h), AH = 3
RET
C Z S O PA

10
? ? ? ? ? ?
 

Halt the System.

Example:
No MOV AX, 5
HLT HLT
operands
C Z S O PA
unchanged
 

Signed divide.

Algorithm:

when operand is a byte:


AL = AX / operand
AH = remainder (modulus)
when operand is a word:
REG AX = (DX AX) / operand
IDIV memory DX = remainder (modulus)
Example:
MOV AX, -203 ; AX = 0FF35h
MOV BL, 4
IDIV BL ; AL = -50 (0CEh), AH = -3 (0FDh)
RET
C Z S O PA
? ? ? ? ? ?
 

Signed multiply.

Algorithm:

when operand is a byte:


AX = AL * operand.
when operand is a word:
REG (DX AX) = AX * operand.
IMUL memory
Example:
MOV AL, -2
MOV BL, -4
IMUL BL ; AX = 8
RET
C Z S O PA
r ? ? r ? ?
CF=OF=0 when result fits into operand of IMUL.  

IN AL, im.byte Input from port into AL or AX.


AL, DX Second operand is a port number. If required to access port

11
number over 255 - DX register should be used.
Example:
IN AX, 4 ; get status of traffic lights.
AX, im.byte IN AL, 7 ; get status of stepper-motor.
AX, DX
C Z S O PA
unchanged
 

Increment.

Algorithm:

operand = operand + 1
REG
INC memory Example:
MOV AL, 4
INC AL ; AL = 5
RET
Z S O PA
r r r r r
CF - unchanged!  

Interrupt numbered by immediate byte (0..255).

Algorithm:

Push to stack:
o flags register
o CS
o IP
 IF = 0
immediate  Transfer control to interrupt procedure
INT
byte

Example:
MOV AH, 0Eh ; teletype.
MOV AL, 'A'
INT 10h ; BIOS interrupt.
RET
C Z S O PA I
unchanged 0
 

INTO No Interrupt 4 if Overflow flag is 1.


operands
Algorithm:

if OF = 1 then INT 4

Example:

12
; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
; so OF = 1 is set:
MOV AL, -5
SUB AL, 127 ; AL = 7Ch (124)
INTO ; process error.
RET
 

Interrupt Return.

Algorithm:

Pop from stack:


o IP
No
IRET o CS
operands
o flags register

C Z S O PA
popped
 

Short Jump if first operand is Above second operand (as set


by CMP instruction). Unsigned.

Algorithm:

if (CF = 0) and (ZF = 0) then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 250
JA label CMP AL, 5
JA label1
PRINT 'AL is not above 5'
JMP exit
label1:
PRINT 'AL is above 5'
exit:
RET
C Z S O PA
unchanged
 

JAE label Short Jump if first operand is Above or Equal to second


operand (as set by CMP instruction). Unsigned.

Algorithm:

if CF = 0 then jump

13
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 5
CMP AL, 5
JAE label1
PRINT 'AL is not above or equal to 5'
JMP exit
label1:
PRINT 'AL is above or equal to 5'
exit:
RET
C Z S O PA
unchanged
 

Short Jump if first operand is Below second operand (as set


by CMP instruction). Unsigned.

Algorithm:

if CF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 1
JB label CMP AL, 5
JB label1
PRINT 'AL is not below 5'
JMP exit
label1:
PRINT 'AL is below 5'
exit:
RET
C Z S O PA
unchanged
 

JBE label Short Jump if first operand is Below or Equal to second


operand (as set by CMP instruction). Unsigned.

Algorithm:

if CF = 1 or ZF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 5
CMP AL, 5

14
JBE label1
PRINT 'AL is not below or equal to 5'
JMP exit
label1:
PRINT 'AL is below or equal to 5'
exit:
RET
C Z S O PA
unchanged
 

Short Jump if Carry flag is set to 1.

Algorithm:

if CF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 255
JC label ADD AL, 1
JC label1
PRINT 'no carry.'
JMP exit
label1:
PRINT 'has carry.'
exit:
RET
C Z S O PA
unchanged
 

JCXZ label Short Jump if CX register is 0.

Algorithm:

if CX = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV CX, 0
JCXZ label1
PRINT 'CX is not zero.'
JMP exit
label1:
PRINT 'CX is zero.'
exit:
RET
C Z S O P A

15
unchanged
 

Short Jump if first operand is Equal to second operand (as


set by CMP instruction). Signed/Unsigned.

Algorithm:

if ZF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 5
JE label CMP AL, 5
JE label1
PRINT 'AL is not equal to 5.'
JMP exit
label1:
PRINT 'AL is equal to 5.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Greater then second operand


(as set by CMP instruction). Signed.

Algorithm:

if (ZF = 0) and (SF = OF) then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 5
JG label CMP AL, -5
JG label1
PRINT 'AL is not greater -5.'
JMP exit
label1:
PRINT 'AL is greater -5.'
exit:
RET
C Z S O P A
unchanged
 

16
Short Jump if first operand is Greater or Equal to second
operand (as set by CMP instruction). Signed.

Algorithm:

if SF = OF then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
JGE label CMP AL, -5
JGE label1
PRINT 'AL < -5'
JMP exit
label1:
PRINT 'AL >= -5'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Less then second operand (as


set by CMP instruction). Signed.

Algorithm:

if SF <> OF then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, -2
JL label CMP AL, 5
JL label1
PRINT 'AL >= 5.'
JMP exit
label1:
PRINT 'AL < 5.'
exit:
RET
C Z S O P A
unchanged
 

JLE label Short Jump if first operand is Less or Equal to second


operand (as set by CMP instruction). Signed.

17
Algorithm:

if SF <> OF or ZF = 1 then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, -2
CMP AL, 5
JLE label1
PRINT 'AL > 5.'
JMP exit
label1:
PRINT 'AL <= 5.'
exit:
RET
C Z S O P A
unchanged
 

Unconditional Jump. Transfers control to another part of the


program. 4-byte address may be entered in this form:
1234h:5678h, first value is a segment second value is an
offset.

Algorithm:

always jump
Example:
include 'emu8086.inc'
label
JMP 4-byte address ORG 100h
MOV AL, 5
JMP label1 ; jump over 2 lines!
PRINT 'Not Jumped!'
MOV AL, 0
label1:
PRINT 'Got Here!'
RET
C Z S O P A
unchanged

JNA label Short Jump if first operand is Not Above second operand (as
set by CMP instruction). Unsigned.

Algorithm:

if CF = 1 or ZF = 1 then jump
Example:

18
include 'emu8086.inc'

ORG 100h
MOV AL, 2
CMP AL, 5
JNA label1
PRINT 'AL is above 5.'
JMP exit
label1:
PRINT 'AL is not above 5.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Not Above and Not Equal to


second operand (as set by CMP instruction). Unsigned.

Algorithm:

if CF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
JNAE label CMP AL, 5
JNAE label1
PRINT 'AL >= 5.'
JMP exit
label1:
PRINT 'AL < 5.'
exit:
RET
C Z S O P A
unchanged
 

JNB label Short Jump if first operand is Not Below second operand (as
set by CMP instruction). Unsigned.

Algorithm:

if CF = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 7
CMP AL, 5

19
JNB label1
PRINT 'AL < 5.'
JMP exit
label1:
PRINT 'AL >= 5.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Not Below and Not Equal to


second operand (as set by CMP instruction). Unsigned.

Algorithm:

if (CF = 0) and (ZF = 0) then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 7
JNBE label CMP AL, 5
JNBE label1
PRINT 'AL <= 5.'
JMP exit
label1:
PRINT 'AL > 5.'
exit:
RET
C Z S O P A
unchanged
 

JNC label Short Jump if Carry flag is set to 0.

Algorithm:

if CF = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
ADD AL, 3
JNC label1
PRINT 'has carry.'
JMP exit
label1:
PRINT 'no carry.'
exit:

20
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Not Equal to second operand


(as set by CMP instruction). Signed/Unsigned.

Algorithm:

if ZF = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
JNE label CMP AL, 3
JNE label1
PRINT 'AL = 3.'
JMP exit
label1:
PRINT 'Al <> 3.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Not Greater then second


operand (as set by CMP instruction). Signed.

Algorithm:

if (ZF = 1) and (SF <> OF) then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
JNG label CMP AL, 3
JNG label1
PRINT 'AL > 3.'
JMP exit
label1:
PRINT 'Al <= 3.'
exit:
RET
C Z S O P A
unchanged

21
Short Jump if first operand is Not Greater and Not Equal to
second operand (as set by CMP instruction). Signed.

Algorithm:

if SF <> OF then jump


Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
JNGE label CMP AL, 3
JNGE label1
PRINT 'AL >= 3.'
JMP exit
label1:
PRINT 'Al < 3.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if first operand is Not Less then second operand


(as set by CMP instruction). Signed.

Algorithm:

if SF = OF then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
JNL label CMP AL, -3
JNL label1
PRINT 'AL < -3.'
JMP exit
label1:
PRINT 'Al >= -3.'
exit:
RET
C Z S O P A
unchanged
 

JNLE label Short Jump if first operand is Not Less and Not Equal to
second operand (as set by CMP instruction). Signed.

Algorithm:

if (SF = OF) and (ZF = 0) then jump

22
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 2
CMP AL, -3
JNLE label1
PRINT 'AL <= -3.'
JMP exit
label1:
PRINT 'Al > -3.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if Not Overflow.

Algorithm:

if OF = 0 then jump
Example:
; -5 - 2 = -7 (inside -128..127)
; the result of SUB is correct,
; so OF = 0:

include 'emu8086.inc'

JNO label ORG 100h


MOV AL, -5
SUB AL, 2 ; AL = 0F9h (-7)
JNO label1
PRINT 'overflow!'
JMP exit
label1:
PRINT 'no overflow.'
exit:
RET
C Z S O P A
unchanged
 

JNP label Short Jump if No Parity (odd). Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:

if PF = 0 then jump
Example:
include 'emu8086.inc'

23
ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JNP label1
PRINT 'parity even.'
JMP exit
label1:
PRINT 'parity odd.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if Not Signed (if positive). Set by CMP, SUB,


ADD, TEST, AND, OR, XOR instructions.

Algorithm:

if SF = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 00000111b ; AL = 7
JNS label OR AL, 0 ; just set flags.
JNS label1
PRINT 'signed.'
JMP exit
label1:
PRINT 'not signed.'
exit:
RET
C Z S O P A
unchanged
 

JNZ label Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD,
TEST, AND, OR, XOR instructions.

Algorithm:

if ZF = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JNZ label1
PRINT 'zero.'

24
JMP exit
label1:
PRINT 'not zero.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if Overflow.

Algorithm:

if OF = 1 then jump
Example:
; -5 - 127 = -132 (not in -128..127)
; the result of SUB is wrong (124),
; so OF = 1 is set:

include 'emu8086.inc'

JO label org 100h


MOV AL, -5
SUB AL, 127 ; AL = 7Ch (124)
JO label1
PRINT 'no overflow.'
JMP exit
label1:
PRINT 'overflow!'
exit:
RET
C Z S O P A
unchanged
 

JP label Short Jump if Parity (even). Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:

if PF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 00000101b ; AL = 5
OR AL, 0 ; just set flags.
JP label1
PRINT 'parity odd.'
JMP exit
label1:

25
PRINT 'parity even.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if Parity Even. Only 8 low bits of result are


checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:

if PF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
JPE label MOV AL, 00000101b ; AL = 5
OR AL, 0 ; just set flags.
JPE label1
PRINT 'parity odd.'
JMP exit
label1:
PRINT 'parity even.'
exit:
RET
C Z S O P A
unchanged
 

JPO label Short Jump if Parity Odd. Only 8 low bits of result are
checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR
instructions.

Algorithm:

if PF = 0 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 00000111b ; AL = 7
OR AL, 0 ; just set flags.
JPO label1
PRINT 'parity even.'
JMP exit
label1:
PRINT 'parity odd.'
exit:
RET

26
C Z S O P A
unchanged
 

Short Jump if Signed (if negative). Set by CMP, SUB, ADD,


TEST, AND, OR, XOR instructions.

Algorithm:

if SF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 10000000b ; AL = -128
JS label OR AL, 0 ; just set flags.
JS label1
PRINT 'not signed.'
JMP exit
label1:
PRINT 'signed.'
exit:
RET
C Z S O P A
unchanged
 

Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST,


AND, OR, XOR instructions.

Algorithm:

if ZF = 1 then jump
Example:
include 'emu8086.inc'

ORG 100h
MOV AL, 5
JZ label CMP AL, 5
JZ label1
PRINT 'AL is not equal to 5.'
JMP exit
label1:
PRINT 'AL is equal to 5.'
exit:
RET
C Z S O P A
unchanged
 

LAHF No Load AH from 8 low bits of Flags register.

27
Algorithm:

AH = flags register

AH bit: 7 6 5 4 3 2 1 0
operands [SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
bits 1, 3, 5 are reserved.

C Z S O P A
unchanged
 

Load memory double word into word register and DS.

Algorithm:

 REG = first word


 DS = second word

Example:

LDS REG, memory ORG 100h


LDS AX, m
RET
m DW 1234h
DW 5678h
END

AX is set to 1234h, DS is set to 5678h.

C Z S O P A
unchanged
 

LEA REG, memory Load Effective Address.

Algorithm:

 REG = address of memory (offset)

Example:

MOV BX, 35h


MOV DI, 12h
LEA SI, [BX+DI] ; SI = 35h + 12h = 47h
Note: The integrated 8086 assembler automatically replaces
LEA with a more efficient MOV where possible. For

28
example:

org 100h
LEA AX, m ; AX = offset of m
RET
m dw 1234h
END

C Z S O P A
unchanged
 

Load memory double word into word register and ES.

Algorithm:

 REG = first word


 ES = second word

Example:

ORG 100h
LES REG, memory
LES AX, m
RET
m DW 1234h
DW 5678h
END

AX is set to 1234h, ES is set to 5678h.

C Z S O P A
unchanged
 

LODSB No Load byte at DS:[SI] into AL. Update SI.


operands
Algorithm:

 AL = DS:[SI]
 if DF = 0 then
o SI = SI + 1

else

o SI = SI - 1

Example:

29
ORG 100h
LEA SI, a1
MOV CX, 5
MOV AH, 0Eh
m: LODSB
INT 10h
LOOP m

RET

a1 DB 'H', 'e', 'l', 'l', 'o'


C Z S O P A
unchanged
 

Load word at DS:[SI] into AX. Update SI.

Algorithm:

 AX = DS:[SI]
 if DF = 0 then
o SI = SI + 2

else

o SI = SI - 2
No
LODSW
operands Example:

ORG 100h
LEA SI, a1
MOV CX, 5
REP LODSW ; finally there will be 555h in AX.
RET

a1 dw 111h, 222h, 333h, 444h, 555h


C Z S O P A
unchanged
 

LOOP label Decrease CX, jump to label if CX not zero.

Algorithm:

 CX = CX - 1
 if CX <> 0 then
o jump

30
else

o no jump, continue

Example:
include 'emu8086.inc'
ORG 100h
MOV CX, 5
label1:
PRINTN 'loop!'
LOOP label1
RET
C Z S O P A
unchanged
 

Decrease CX, jump to label if CX not zero and Equal (ZF =


1).

Algorithm:

 CX = CX - 1
 if (CX <> 0) and (ZF = 1) then
o jump

else

o no jump, continue

Example:
; Loop until result fits into AL alone,
; or 5 times. The result will be over 255
LOOPE label ; on third loop (100+100+100),
; so loop will exit.

include 'emu8086.inc'

ORG 100h
MOV AX, 0
MOV CX, 5
label1:
PUTC '*'
ADD AX, 100
CMP AH, 0
LOOPE label1
RET
C Z S O P A
unchanged
 

31
Decrease CX, jump to label if CX not zero and Not Equal (ZF
= 0).

Algorithm:

 CX = CX - 1
 if (CX <> 0) and (ZF = 0) then
o jump

else

o no jump, continue

Example:
; Loop until '7' is found,
; or 5 times.
LOOPNE label
include 'emu8086.inc'

ORG 100h
MOV SI, 0
MOV CX, 5
label1:
PUTC '*'
MOV AL, v1[SI]
INC SI ; next byte (SI=SI+1).
CMP AL, 7
LOOPNE label1
RET
v1 db 9, 8, 7, 6, 5
C Z S O P A
unchanged
 

LOOPNZ label Decrease CX, jump to label if CX not zero and ZF = 0.

Algorithm:

 CX = CX - 1
 if (CX <> 0) and (ZF = 0) then
o jump

else

o no jump, continue

Example:
; Loop until '7' is found,
; or 5 times.
include 'emu8086.inc'
ORG 100h

32
MOV SI, 0
MOV CX, 5
label1:
PUTC '*'
MOV AL, v1[SI]
INC SI ; next byte (SI=SI+1).
CMP AL, 7
LOOPNZ label1
RET
v1 db 9, 8, 7, 6, 5
C Z S O P A
unchanged
 

Decrease CX, jump to label if CX not zero and ZF = 1.

Algorithm:

 CX = CX - 1
 if (CX <> 0) and (ZF = 1) then
o jump

else

o no jump, continue

Example:
; Loop until result fits into AL alone,
LOOPZ label ; or 5 times. The result will be over 255
; on third loop (100+100+100),
; so loop will exit.
include 'emu8086.inc'
ORG 100h
MOV AX, 0
MOV CX, 5
label1:
PUTC '*'
ADD AX, 100
CMP AH, 0
LOOPZ label1
RET
C Z S O P A
unchanged
 

MOV REG, memory Copy operand2 to operand1.


memory, REG
REG, REG The MOV instruction cannot:
memory,  set the value of the CS and IP registers.
immediate  copy value of one segment register to another
REG, segment register (should copy to general register

33
first).
 copy immediate value to segment register (should
copy to general register first).

Algorithm:
immediate
operand1 = operand2
Example:
SREG,
memory
ORG 100h
memory,
MOV AX, 0B800h ; set AX = B800h (VGA memory).
SREG
MOV DS, AX ; copy value of AX to DS.
REG, SREG
MOV CL, 'A' ; CL = 41h (ASCII code).
SREG, REG
MOV CH, 01011111b ; CL = color attribute.
MOV BX, 15Eh ; BX = position on screen.
MOV [BX], CX ; w.[0B800h:015Eh] = CX.
RET ; returns to operating system.
C Z S O P A
unchanged
 

MOVSB No Copy byte at DS:[SI] to ES:[DI]. Update SI and DI.


operands
Algorithm:

 ES:[DI] = DS:[SI]
 if DF = 0 then
o SI = SI + 1
o DI = DI + 1

else

o SI = SI - 1
o DI = DI - 1

Example:

ORG 100h

CLD
LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSB
RET

a1 DB 1,2,3,4,5
a2 DB 5 DUP(0)
C Z S O P A
unchanged

34
 

Copy word at DS:[SI] to ES:[DI]. Update SI and DI.

Algorithm:

 ES:[DI] = DS:[SI]
 if DF = 0 then
o SI = SI + 2
o DI = DI + 2

else

o SI = SI - 2
o DI = DI - 2
No
MOVSW Example:
operands

ORG 100h
CLD
LEA SI, a1
LEA DI, a2
MOV CX, 5
REP MOVSW
RET

a1 DW 1,2,3,4,5
a2 DW 5 DUP(0)
C Z S O P A
unchanged
 

Unsigned multiply.

Algorithm:

when operand is a byte:


AX = AL * operand.
when operand is a word:
REG (DX AX) = AX * operand.
MUL memory
Example:
MOV AL, 200 ; AL = 0C8h
MOV BL, 4
MUL BL ; AX = 0320h (800)
RET
C Z S O P A
r ? ? r ? ?
CF=OF=0 when high section of the result is zero.  

NEG REG Negate. Makes operand negative (two's complement).

35
Algorithm:

 Invert all bits of the operand


 Add 1 to inverted operand

memory Example:
MOV AL, 5 ; AL = 05h
NEG AL ; AL = 0FBh (-5)
NEG AL ; AL = 05h (5)
RET
C Z S O P A
r r r r r r
 

No Operation.

Algorithm:

 Do nothing

Example:
No
NOP ; do nothing, 3 times:
operands NOP
NOP
NOP
RET
C Z S O P A
unchanged
 

Invert each bit of the operand.

Algorithm:

 if bit is 1 turn it to 0.
 if bit is 0 turn it to 1.
REG
NOT memory
Example:
MOV AL, 00011011b
NOT AL ; AL = 11100100b
RET
C Z S O P A
unchanged
 

OR REG, memory Logical OR between all bits of two operands. Result is stored
memory, REG in first operand.
REG, REG
memory, These rules apply:

36
1 OR 1 = 1
1 OR 0 = 1
0 OR 1 = 1
0 OR 0 = 0
immediate
REG, Example:
immediate MOV AL, 'A' ; AL = 01000001b
OR AL, 00100000b ; AL = 01100001b ('a')
RET
C Z S O P A
0 r r 0 r ?
 

Output from AL or AX to port.


First operand is a port number. If required to access port
number over 255 - DX register should be used.

Example:
im.byte, AL MOV AX, 0FFFh ; Turn on all
im.byte, AX OUT 4, AX ; traffic lights.
OUT
DX, AL
DX, AX MOV AL, 100b ; Turn on the third
OUT 7, AL ; magnet of the stepper-motor.
C Z S O P A
unchanged
 

Get 16 bit value from the stack.

Algorithm:

 operand = SS:[SP] (top of the stack)


 SP = SP + 2

REG
POP SREG
Example:
memory
MOV AX, 1234h
PUSH AX
POP DX ; DX = 1234h
RET
C Z S O P A
unchanged
 

POPA No Pop all general purpose registers DI, SI, BP, SP, BX, DX, CX,
operands AX from the stack.
SP value is ignored, it is Popped but not set to SP register).

Note: this instruction works only on 80186 CPU and later!

37
Algorithm:

 POP DI
 POP SI
 POP BP
 POP xx (SP value ignored)
 POP BX
 POP DX
 POP CX
 POP AX

C Z S O P A
unchanged
 

Get flags register from the stack.

Algorithm:

No  flags = SS:[SP] (top of the stack)


POPF  SP = SP + 2
operands

C Z S O P A
popped
 

Store 16 bit value in the stack.

Note: PUSH immediate works only on 80186 CPU and


later!

Algorithm:

 SP = SP - 2
REG  SS:[SP] (top of the stack) = operand
SREG
PUSH
memory
immediate
Example:
MOV AX, 1234h
PUSH AX
POP DX ; DX = 1234h
RET
C Z S O P A
unchanged
 

PUSHA No Push all general purpose registers AX, CX, DX, BX, SP, BP,
operands SI, DI in the stack.

38
Original value of SP register (before PUSHA) is used.

Note: this instruction works only on 80186 CPU and later!

Algorithm:

 PUSH AX
 PUSH CX
 PUSH DX
 PUSH BX
 PUSH SP
 PUSH BP
 PUSH SI
 PUSH DI

C Z S O P A
unchanged
 

Store flags register in the stack.

Algorithm:

No  SP = SP - 2
PUSHF  SS:[SP] (top of the stack) = flags
operands

C Z S O P A
unchanged
 

RCL memory, Rotate operand1 left through Carry Flag. The number of
immediate rotates is set by operand2.
REG, When immediate is greater then 1, assembler generates
immediate several RCL xx, 1 instructions because 8086 has machine
code only for this instruction (the same principle works for
memory, CL all other shift/rotate instructions).
REG, CL
Algorithm:

shift all bits left, the bit that goes off is set to CF and previous value
of CF is inserted to the right-most position.

Example:
STC ; set carry (CF=1).
MOV AL, 1Ch ; AL = 00011100b
RCL AL, 1 ; AL = 00111001b, CF=0.
RET
C O
r r

39
OF=0 if first operand keeps original sign.  

Rotate operand1 right through Carry Flag. The number of


rotates is set by operand2.

Algorithm:

memory, shift all bits right, the bit that goes off is set to CF and previous
immediate value of CF is inserted to the left-most position.
REG,
RCR immediate Example:
STC ; set carry (CF=1).
memory, CL MOV AL, 1Ch ; AL = 00011100b
REG, CL RCR AL, 1 ; AL = 10001110b, CF=0.
RET
C O
r r
OF=0 if first operand keeps original sign.  

Repeat following MOVSB, MOVSW, LODSB, LODSW, STOSB,


STOSW instructions CX times.

Algorithm:

check_cx:

if CX <> 0 then
 do following chain instruction
chain
REP  CX = CX - 1
instruction
 go back to check_cx

else
 exit from REP cycle

Z
r
 

REPE chain Repeat following CMPSB, CMPSW, SCASB, SCASW


instruction instructions while ZF = 1 (result is Equal), maximum CX
times.

Algorithm:

check_cx:

if CX <> 0 then
 do following chain instruction
 CX = CX - 1
 if ZF = 1 then:

40
o go back to check_cx

else

o exit from REPE cycle

else
 exit from REPE cycle

Example:
see cmpsb.asm in c:\emu8086\examples\.

Z
r
 

Repeat following CMPSB, CMPSW, SCASB, SCASW


instructions while ZF = 0 (result is Not Equal), maximum CX
times.
Algorithm:

check_cx:

if CX <> 0 then
 do following chain instruction
 CX = CX - 1
 if ZF = 0 then:
chain o go back to check_cx
REPNE
instruction
else

o exit from REPNE cycle

else
 exit from REPNE cycle

Z
r
 

REPNZ chain Repeat following CMPSB, CMPSW, SCASB, SCASW


instruction instructions while ZF = 0 (result is Not Zero), maximum CX
times.

Algorithm:

check_cx:

if CX <> 0 then

41
 do following chain instruction
 CX = CX - 1
 if ZF = 0 then:
o go back to check_cx

else

o exit from REPNZ cycle

else
 exit from REPNZ cycle

Z
r
 

Repeat following CMPSB, CMPSW, SCASB, SCASW


instructions while ZF = 1 (result is Zero), maximum CX
times.

Algorithm:

check_cx:

if CX <> 0 then
 do following chain instruction
 CX = CX - 1
 if ZF = 1 then:
chain o go back to check_cx
REPZ
instruction
else

o exit from REPZ cycle

else
 exit from REPZ cycle

Z
r
 

RET No Return from near procedure.


operands
or even Algorithm:
immediate
 Pop from stack:
o IP
 if immediate operand is present: SP = SP + operand

42
Example:

ORG 100h ; for COM file.


CALL p1
ADD AX, 1
RET ; return to OS.
p1 PROC ; procedure declaration.
MOV AX, 1234h
RET ; return to caller.
p1 ENDP
C Z S O P A
unchanged
 

Return from Far procedure.

Algorithm:

No  Pop from stack:


o IP
operands
RETF o CS
or even
immediate  if immediate operand is present: SP = SP + operand

C Z S O P A
unchanged
 

Rotate operand1 left. The number of rotates is set by


operand2.

Algorithm:
memory,
immediate shift all bits left, the bit that goes off is set to CF and the same bit is
REG, inserted to the right-most position.
ROL immediate Example:
MOV AL, 1Ch ; AL = 00011100b
memory, CL ROL AL, 1 ; AL = 00111000b, CF=0.
REG, CL RET
C O
r r
OF=0 if first operand keeps original sign.  

ROR memory, Rotate operand1 right. The number of rotates is set by


immediate operand2.
REG,
immediate Algorithm:

memory, CL shift all bits right, the bit that goes off is set to CF and the same bit
REG, CL is inserted to the left-most position.
Example:

43
MOV AL, 1Ch ; AL = 00011100b
ROR AL, 1 ; AL = 00001110b, CF=0.
RET
C O
r r
OF=0 if first operand keeps original sign.  

Store AH register into low 8 bits of Flags register.

Algorithm:

flags register = AH

No AH bit: 7 6 5 4 3 2 1 0
SAHF
operands [SF] [ZF] [0] [AF] [0] [PF] [1] [CF]
bits 1, 3, 5 are reserved.

C Z S O P A
r r r r r r
 

Shift Arithmetic operand1 Left. The number of shifts is set


by operand2.

Algorithm:
memory,
immediate  Shift all bits left, the bit that goes off is set to CF.
REG,  Zero bit is inserted to the right-most position.
SAL immediate
Example:
memory, CL MOV AL, 0E0h ; AL = 11100000b
REG, CL SAL AL, 1 ; AL = 11000000b, CF=1.
RET
C O
r r
OF=0 if first operand keeps original sign.  

SAR memory, Shift Arithmetic operand1 Right. The number of shifts is set
immediate by operand2.
REG,
immediate Algorithm:

memory, CL  Shift all bits right, the bit that goes off is set to CF.
REG, CL  The sign bit that is inserted to the left-most position has the same
value as before shift.

Example:
MOV AL, 0E0h ; AL = 11100000b
SAR AL, 1 ; AL = 11110000b, CF=0.

44
MOV BL, 4Ch ; BL = 01001100b
SAR BL, 1 ; BL = 00100110b, CF=0.

RET
C O
r r
OF=0 if first operand keeps original sign.  

Subtract with Borrow.

Algorithm:

REG, memory operand1 = operand1 - operand2 - CF


memory, REG
REG, REG Example:
SBB memory, STC
immediate MOV AL, 5
REG, SBB AL, 3 ; AL = 5 - 3 - 1 = 1
immediate
RET
C Z S O P A
r r r r r r
 

Compare bytes: AL from ES:[DI].

Algorithm:

 ES:[DI] - AL
 set flags according to result:
OF, SF, ZF, AF, PF, CF
 if DF = 0 then
No o DI = DI + 1
SCASB
operands
else

o DI = DI - 1

C Z S O P A
r r r r r r
 

SCASW No Compare words: AX from ES:[DI].


operands
Algorithm:

 ES:[DI] - AX
 set flags according to result:
OF, SF, ZF, AF, PF, CF

45
 if DF = 0 then
o DI = DI + 2

else

o DI = DI - 2

C Z S O P A
r r r r r r
 

Shift operand1 Left. The number of shifts is set by


operand2.

Algorithm:

memory,  Shift all bits left, the bit that goes off is set to CF.
immediate  Zero bit is inserted to the right-most position.
REG,
SHL immediate
Example:
MOV AL, 11100000b
memory, CL
SHL AL, 1 ; AL = 11000000b, CF=1.
REG, CL
RET
C O
r r
OF=0 if first operand keeps original sign.  

Shift operand1 Right. The number of shifts is set by


operand2.

Algorithm:

memory,  Shift all bits right, the bit that goes off is set to CF.
immediate  Zero bit is inserted to the left-most position.
REG,
SHR immediate
Example:
MOV AL, 00000111b
memory, CL
SHR AL, 1 ; AL = 00000011b, CF=1.
REG, CL
RET
C O
r r
OF=0 if first operand keeps original sign.  

STC No Set Carry flag.


operands
Algorithm:

46
CF = 1

C
1
 

Set Direction flag. SI and DI will be decremented by chain instructions:


CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB,
STOSW.

Algorithm:
No
STD
operands DF = 1

D
1
 

Set Interrupt enable flag. This enables hardware interrupts.

Algorithm:

No IF = 1
STI
operands
I
1
 

STOSB No Store byte in AL into ES:[DI]. Update DI.


operands
Algorithm:

 ES:[DI] = AL
 if DF = 0 then
o DI = DI + 1

else

o DI = DI - 1

Example:

ORG 100h
LEA DI, a1
MOV AL, 12h
MOV CX, 5
REP STOSB

RET

47
a1 DB 5 dup(0)
C Z S O P A
unchanged
 

Store word in AX into ES:[DI]. Update DI.

Algorithm:

 ES:[DI] = AX
 if DF = 0 then
o DI = DI + 2

else

o DI = DI - 2

No Example:
STOSW
operands
ORG 100h
LEA DI, a1
MOV AX, 1234h
MOV CX, 5
REP STOSW

RET

a1 DW 5 dup(0)
C Z S O P A
unchanged
 

Subtract.

Algorithm:
REG, memory
memory, REG operand1 = operand1 - operand2
REG, REG
SUB memory, Example:
immediate MOV AL, 5
REG, SUB AL, 1 ; AL = 4
immediate RET
C Z S O P A
r r r r r r
 

TEST REG, memory Logical AND between all bits of two operands for flags only.
memory, REG These flags are effected: ZF, SF, PF. Result is not stored
REG, REG anywhere.
memory,

48
These rules apply:

1 AND 1 = 1
1 AND 0 = 0
0 AND 1 = 0
0 AND 0 = 0

immediate
REG, Example:
immediate MOV AL, 00000101b
TEST AL, 1 ; ZF = 0.
TEST AL, 10b ; ZF = 1.
RET
C Z S O P
0 r r 0 r
 

Exchange values of two operands.

Algorithm:

operand1 < - > operand2

REG, memory Example:


XCHG memory, REG MOV AL, 5
REG, REG MOV AH, 2
XCHG AL, AH ; AL = 2, AH = 5
XCHG AL, AH ; AL = 5, AH = 2
RET
C Z S O P A
unchanged
 

XLATB No Translate byte from table.


operands Copy value of memory byte at DS:[BX + unsigned AL] to AL
register.

Algorithm:

AL = DS:[BX + unsigned AL]

Example:

ORG 100h
LEA BX, dat
MOV AL, 2
XLATB ; AL = 33h
RET

dat DB 11h, 22h, 33h, 44h, 55h


C Z S O P A

49
unchanged
 

Logical XOR (Exclusive OR) between all bits of two operands.


Result is stored in first operand.

These rules apply:

1 XOR 1 = 0
REG, memory 1 XOR 0 = 1
memory, REG 0 XOR 1 = 1
REG, REG 0 XOR 0 = 0
XOR memory,
immediate
REG, Example:
immediate MOV AL, 00000111b
XOR AL, 00000010b ; AL = 00000101b
RET
C Z S O P A
0 r r 0 r ?

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