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179
UNIT-IV

TRANSISTOR BIASING

Introduction:
The basic function transistor is to do amplification. The process of raising the strength of a
weak signal without any change in its shape is known as faithful amplification.

For faithful amplification, the following three conditions must be satisfied:

i) The emitter-base junction should be forward biased,
ii) The collector-base junction should be reverse biased.
iii) Three should be proper zero signal collector current.

The proper flow of zero signal collector current (proper operating point of a transistor) and
the maintenance of proper collector-emitter voltage during the passage of signal is known as
transistor biasing.

When a transistor is not properly biased, it work inefficiently and produces distortion in the
output signal. Hence a transistor is to be biased correctly. A transistor is biased either with the
help of battery (or) associating a circuit with the transistor. The latter method is generally
employed. The circuit used with the transistor is known as biasing circuit.

In order to produce distortion-free output in amplifier circuits, the supply voltages and
resistances in the circuit must be suitably chose. These voltages and resistances establish a set of
d.c. voltage V
CEQ
and current I
CQ
to operate the transistor in the active region. These voltages and
currents are called quiescent values which determine the operating point (or) Q-Point for the
transistor.

The process of giving proper supply voltages and resistances for obtaining the desired Q-
Point is called biasing.

DC Load Line:
Consider common emitter configuration circuit shown in figure below:

In transistor circuit analysis generally it is required to determine the value of I
C
for any
desired value of V
CE
. From the load line method, we can determine the value of I
C
for any desired
value of V
CE
. The output characteristics of CE configuration is shown in figure below:
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By applying KVL to the collector circuit

0 V I R V
C C C CE
+ + =

V I R V
CC C C CE
= +
V V I R
CE CC C C
=

If the bias voltage V
BB
is such that the transistor is not conducting then I
C
=0 and V
CE
= V
CC
.
Therefore, when I
C
=0, V
CE
= V
CC
this point is plotted on the output characteristics as point A.

If V
CE
=0 then

0 V I R
CC C C
=

V
CC
I
C
R
C
=
Therefore, V
CE
=0,
V
CC
I
C
R
C
= this point is plotted on the output characteristics as point B.
The line drawn through these points is straight line d.c load line.

The d.c. load line is plot of I
C
versus V
CE
for a given value of R
C
and a given level of V
CC
.
Hence from the load line we can determine the I
C
for any desired value of V
CE
.

Operating Point (or) Quiescent Point:

In designing a circuit, a point on the load line is selected as the dc bias point (or) quiescent
point. The Q-Point specifies the collector current I
C
and collector to emitter voltage V
CE
that exists
when no input signal is applied.

The dc bias point (or) quiescent point is the point on the load line which represents the
current in a transistor and the voltage across it when no signal is applied. The zero signal values of
I
C
ad V
CE
are known as the operating point.

Biasing:

The process of giving proper supply voltages and resistances for obtaining the desired Q-
point is called biasing.
How to choose the operating point on DC load line:
The transistor acts as an amplifier when it is operated in active region. After the d.c.
conditions are established in the circuit, when an a.c. signal is applied to the input, the base
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current varies according to te amplitude of the signal and causes I
C
to vary consequently producing
an output voltage variation. This can be seen from output characterizes.

Fig. Operating point near saturation region gives clipping at the positive peak.
Consider point A which is very near to the saturation point, even though the base current is
varying sinusoidally the output current and output voltage is seen to be clipped at the positive
peaks. This results in distortion of the signal.

Consider point B which is very near to the cut-off region. The output signal is now clipped
at the negative peak. Hence this two is not a suitable operating point.


Fig. Operating point near cut-off region given clipping at the negative peak.

Consider point C which is the mid point of the DC load line then the output signal will not
be distorted.

Fig. Operating point at the centre of active region is most suitable.

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A good amplifier amplifies signals without introducing distortion. Thus always the operating
point is chosen as the mid point of the DC load line.

Stabilization:

The maintenance of operating point stable is known as Stabilization.
There are two factors which are responsible for shifting the operating point. They are:

i) The transistor parameters are temperature dependent.
ii) When a transistor is replaced by another of same type, there is a wide spread in
the values of transistor parameters.

So, stabilization of the operating point is necessary due to the following reasons:

i) Temperature dependence of I
C
.
ii) Individual variations and
iii) Thermal runaway.
Temperature dependence of I
C
:

The instability of I
C
is principally caused by the following three sources:

i) The I
CO
doubles for every 10
o
C rise in temperature.
ii) Increase of with increase of temperature.
iii) The V
BE
decreases about 2.5mV per
o
C increase in temperature.

Individual variations:

When a transistor is replaced by another transistor of the same type, the values of and
V
BE
are not exactly the same. Hence the operating point is changed. So it is necessary to stabilize
the operating point irrespective of individual variations in transistors parameters.

Thermal Runaway:

Depending upon the construction of a transistor, the collector junction can withstand
maximum temperature. The range of temperature lies between 60
o
C to 100
o
C for Ge transistor
and 150
o
C to 225
o
C for Si transistor. If the temperature increases beyond this range then the
transistor burns out. The increase in the collector junction temperature is due to thermal runaway.

When a collector current flows in a transistor, it is heated i.e., its temperature increases. If
no stabilization is done, the collector leakage current also increases. This further increases the
transistor temperature. Consequently, there is a further increase in collector leakage current. The
action becomes cumulative and the transistor may ultimately burn out. The self-destruction of an
unstabilized transistor is known as thermal runaway.

The following two techniques are used for stabilization.

1) Stabilization techniques:

The technique consists in the use of a resistive biasing circuit which permits such a
variation of base current I
B
as to maintain I
C
almost constant in spite of I
CO
, and V
BE
.

2) Compensation techniques:

In this technique, temperature sensitive devices such as diodes, thermistors and
sensistors etc., are used. Such devices produce compensating voltages and current in such
a way that the operating points maintained stable.

Stability factors:

Since there are three variables which are temperature dependent, we can define three
stability factors as below:

i) S: The stability factor S is defined as the ration of change of collector current I
C
with
respect to the reverse saturation current I
CO
, keeping and V
BE
constant
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i.e.,
I I
C C
S
I I
CO CO

=

V
BE
, constant
ii) S: The stability factor S is defined as the rate of change of I
C
with respect to V
BE
,
keeping I
CO
and constant i.e.,

'
I I
C C
S
V V
BE BE

=

I
CO
, constant

iii) S: The stability factor S is defined as the rate of change of I
C
with respect to ,
keeping I
CO
and V
BE
constant i.e.,


'
I I
C C
S


=

I
CO
, V
BE
constant
Ideally, stability factor should be perfectly zero to keep operating point stable.
Practically, stability factor should have the value as minimum as possible.

Derivation of Stability Factor (S):

For a common emitter configuration collector current is given as,

I I I
B C CEO
= +
( ) 1 I I I
B C CO
= + + .. (1)

Differentiating equation (1) w.r.t. I
C
keeping constant, we get

( ) 1 1
I I
CO B
I I
C C


= + +


( ) 1 1
I I
CO B
I I
C C


= +



1
1
I
C
I
I
B
CO
I
C

+
=

1
1
I
B
I
C
S

+
=

(2)
To obtain S and S:

In standard equation of I
C
, replace I
B
in terms of V
BE
to get S.
Differentiating equation of I
C
w.r.t. after replacing I
B
in terms of V
BE
to get S.

Methods of Biasing:

Some of the methods used for providing bias for a transistor are as follows:

1) Fixed bias (or) base resistor method.
2) Collector to base bias (or) biasing with feedback resistor.
3) Voltage divider bias.
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1). Fixed bias (or) base resistor method:

A CE amplifier used fixed bias circuit is shown in figure below:

Fig. Fixed bias circuit.
In this method, a high resistance R
B
is connected between positive terminal of supply V
CC

and base of the transistor. Here the required zero signal base current flows through R
B
and is
provided by V
CC
.

In figure, the base-emitter junction is forward biased because the base is positive w.r.t.
emitter. By a proper selection of R
B
, the required zero signal base current (and hence I
C
=I
B
) can
be made to flow.

Circuit Analysis:

Base Circuit:

Consider the base-emitter circuit loop of the above figure.
Writing KVL to the loop, we obtain

0 V I R V
B B BE CC
+ + =
V I R V
B B BE CC
= +

V V
BE CC
I
B
R
B

=
But I I I
B C CEO
= +
As I
CEO
is very small, I I
B C


V V
BE CC
I
C
R
B

=
| |
|
|
\


, V
CC
, V
BE
are constant for a transistor I
C
depends on R
B
.

Choose suitable value of R
B
to get constant I
C
in active region.

( )
V V
BE CC
R
B
I
C

= (or)
V
CC
R
B
I
C

=
( )
V V
BE CC
<< Q
Collector Circuit:

Consider the collector-emitter circuit loop of the circuit.

Writing KVL to the collector circuit, we get
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0 V I R V
B B CC CE
+ + =
V V I R
CE CC C C
=

Stability factor S:

The stability factor S is given by,
1
1
I
B
I
C
S

+
=

We have
V V
BE CC
I
B
R
B

= = constant 0
I
B
I
C

1 S = +
If =100 then S=101. This shows that I
C
changes 101 times as much as any changes in
I
CO
. Thus I
C
is dependent upon I
CO
and temperature.

The value of S is high and has very poor stability.

Stability factor S:

We have ( ) 1 I I I
B C CO
= + +
But
V V
BE CC
I
B
R
B

=
( ) 1
V V
BE CC
I I
C CO
R
B

= + +
| |
|
|
\

Differentiating the above equation w.r.t. I
C
,

We get 1
V
BE
R I
B C

'
S
R
B

=
Stability factor S:

We have ( ) 1 I I I
B C CO
= + +

Differentiating the above equation w.r.t. ,

We get
I
C
I I
B CO

= +

''
I
C
S

= (QI
CO
is very small &
I
C
I
B

= )
Problem:

1) Figure below shows a silicon transistor with =100 and biased by base resistor method.
Determine the operating point.
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Solution:

Given V
CC
=10V, V
BE
=0.7V (Silicon transistor), =100, R
B
=930k.
Applying KVL to base-emitter loop,
V V
BE CC
V V I R I
BE B B B CC
R
B

= =
10 0.7
100
3
930 10
1
V V
BE CC
I I
B C
R
B
mA


= = = =

| |
| |
|
|
|
\
\


Applying KVL to collector-emitter loop,

V V I R V V I R
CC CE C C CE CC C C
= =

( )
3 3
10 1 10 4 10 6 V
CE
V

= =

Operating point is (6V, 1mA)

2. For the following circuit shown in figure below, find the operating point.

Solution:

DC equivalent of above circuit is shown below.

KVL to base-emitter loop is

( )
0 V I R V I I R
B B BE B E CC C
+ + + + =
I R I R I R V V
B B B E B B BE CC
+ + =

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( ) 1
V V
BE CC
I
B
R R
B E

=
+ +


( )
20 0.7
3
430 51 10
40.1 I
B
A

= =
+

2.01 I I
B C
mA = =
KVL to collector-emitter loop is
0 V I R V I R
E CC C C CE C
+ + + =

( )
V V I R R
E CE CC C C
= +

3 3
20 2.01 10 (2 1) 10 V
CE

= + =20-6.03 = 13.97V
Operating point is Q (13.97V, 2.01mA)
Advantages of fixed bias circuit:
1. This is a simple circuit which uses very few components.
2. The operating point can be fixed anywhere in the active region of the characteristics by
simply changing the values of R
B
. Thus, it provides maximum flexibility in the design.

Disadvantages of fixed bias circuit:

1. With the rise in temperature the operating point if not stable.
2. When the transistor is replaced by another with different value of , the operating point
with shift i.e., the stabilization of operating point is very poor in fixed bias circuit.

Because of these disadvantages, fixed bias circuit required some modifications. In the modified
circuit, R
B
is connected between collector and base. Hence the circuit is called collector to base
bias circuit.

2). Collector to Base bias (or) Biasing with feedback resistor:

A CE amplifier using collector to base bias circuit is shown in the figure. In this method, the
biasing resistor is connected between the collector and the base of the transistor.


Fig. CollectortoBase bias circuit.

Circuit Analysis:

Base Circuit:
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Consider the base-emitter circuit, applying the KVL to the circuit we get,


( )
0 V I I R I R V
B B B BE CC C C
+ =

( )
V I R R I R V
B B BE CC C C C
= + + +


V V I R
BE CC C C
I
B
R R
B C

=
+
.. (1)
But I
C
= I
B

( )
V I R V
BE CC C C
I
C
R R
B C

=
+
.. (2)

Collector circuit:
Consider the collector-emitter circuit, applying the KVL to the circuit we get


( )
0 V I I R V
B CC C C CE
+ + + =

( )
V V I I R
B CE CC C C
= + . (3)
Stability factor S:

The stability factor S is given by,


1
1
I
B
I
C
S

+
=

We have
V V I R
BE CC C C
I
B
R R
B C

=
+
= constant

Differentiating the above equation w.r.t. I
C
we get

R I
C B
I R R
B C C

=
+


1
1
S
R
C
R R
B C

+
=
+
+
(4)

The stability factor S is smaller than the value obtained by fixed bias circuit. Also S can be
made smaller by making R
B
small (or) R
C
large.

Stability factor S:

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We have
( )
V V I R
BE CC C C
I
C
R R
B C

=
+


Differentiating the above equation w.r.t. I
C
,
We get 1
R V
C BE
R R I R R
B B C C C

=
+ +

1
R V
C BE
R R R R I
B B C C C

+ =
+ +


R R R V
B C C BE
R R R R I
B B C C C

+ +
=
+ +


( )
'
1
S
R R
B C

=
+ +
.. (5)
Stability factor S:

We have
( )
V V I R
BE CC C C
I
C
R R
B C

=
+


Differentiating the above equation w.r.t. ,

We get
I V V R I
BE C CC C C
I
C
R R R R
B B C C

= +
+ +
(
(


1
I R V V I R
BE C C CC C C
R R R R
B B C C

+ =
+ +
(
(
(


( ) 1
I
C
R R V V I R
B BE C CC C C

+ =

(



( )
''
1
V V I R
BE CC C C
S
R R
B C

=
+ +


( )
( )
''
1
I R R
B C C
S
R R
B C

+
=
+ +
(6)
Problems:
3. An N-P-N transistor with =50 is used in a CE circuit with V
CC
=10V, R
C
=2k. The bias is
obtained by connecting a 100k resistance from collector to base. Assume V
BE
=0.7V. Find
i) the quiescent point and
ii) Stability factor S

Solution:

i) Applying KVL to the base circuit,

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( )
V I I R I R V
B B B BE CC C C
+ + + =

( )
V I R R I R V
B B BE CC C C C
= + + +


V V I R
BE CC C C
I
B
R R
B C

=
+

( )
V V I R
BE CC C C
I
C
R R
B C

=
+


( )
3
50 10 0.7 2 10
3
102 10
I
C
I
C

2.3
C
I mA =
Applying KVL to the collector circuit,

( )
V I I R V
B CC C C CE
+ + =
( )
V V I I R
B CE CC C C
+ =

( )
6 3 3
10 46 10 2.3 10 2 10

= +
5.308 V V
CE
= The quiescent point is (5.308V, 2.3mA)
ii) Stability factor, S:

1
1
S
R
C
R R
B C

+
=
+
+


51
25.75
3
20 10
1 50
3
102 10
S
| |
|
|
\
= =

4. A transistor with =45 is used with collector to base resistor R
B
biasing with quiescent value of
5V for V
CE
. If V
CC
=24V, R
C
=10k, R
E
=270, find the value of R
B
.
Solution:
Applying KVL to collector and emitter loop, we have

0 V I R V I R
E E CC C C CE
=

( )
V V I R I I R
B E CC CE C C C
= + +
( ) 1 V V R R I
E B CC CE C
= + +
(



( ) 1
V V
BE CC
I
B
R R
E C

=
+ +

24 5
45 10 50 0.27

=
+

=0.041 mA
Further, 0 V I R I R V I R
B B BE E E CC C C
=
( ) 1 V V R I I R R I
BE B B B E B CC C
= + + + `
24 0.7 45 10 50 0.27 I R
B B
= + + (

23.3 450 12.42 0.041 R
B
= + +
(



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105.87
B
R K =
3). Voltage Divider Bias (Or) Self-Bias (Or) Emitter Bias:
The voltage divider bias circuit is shown in figure.

Fig. Voltage divider bias circuit.
In this method, the biasing is provided by three resistors R
1
, R
2
and R
E
. The resistors R
1

and R
2
acts as a potential divider giving a fixed voltage to the base.

If collector current increases due to change in temperature (or) change in , the emitter
current I
E
also increases and the voltage drop across R
E
increases, reducing the voltage difference
between base and emitter (V
BE
).
Due to reduction in V
BE
, base current I
B
and hence collector current I
C
is also reduces.
Therefore, we can say that negative feedback exists in the emitter bias circuit. This reduction in
collector current I
C
components for the original change in I
C
.

Circuit Analysis:

Let current flows through R
1
. As the base current I
B
is very small, the current flowing
through R
2
can also be taken as I.

The calculation of collector current I
C
is as follows:
The current I flowing through R
1
(or) R
2
is given by
1 2
V
CC
I
R R
=
+
(1)
The voltage V
2
developed across R
2
is given by,
2 2
1 2
V
CC
V R
R R
=
+
| |
|
|
\
.. (2)
Base Circuit:

Applying KVL to the base circuit, we have


2
V V V V I R
BE E BE E E
= + = +
2
V V I R
BE E C
= +
( )
I I
E C
Q

2
V V
BE
I
C
R
E

= .. (3)
Hence I
C
is almost independent of transistor parameters and hence good stabilization is
ensured.

Collector Circuit:

Applying KVL to the collector circuit, we have

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V I R V I R
E E CC C C CE
= + + V I R V I R
E CC C C CE C
= + +
( )
I I
E C
Q

( )
V V I R R
E CE CC C C
= + . (4)

Circuit analysis using Thevenins Theorem:

The Thevenin equivalent circuit of voltage-divider bias is as shown below:




Fig. Simplified equivalent circuit.

From above figure we have,


2
2
1 2
R
V V V
CC Th
R R
= =
+
| |
|
|
\
(5)


1 2
1 2
1 2
R R
R R R
Th
R R
= =
+
(6)

Applying KVL to the base-emitter circuit, we have


( )
V I R V I I R
B BE B E C Th Th
= + + + .. (7)

Applying KVL to the collector-emitter circuit, we have


( )
V V I R R
E CE CC C C
= +
( )
I I
B C
>> Q
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... (8)
From equation (8), we have


V V
CC CE
I
C
R R
E C

=
+

Substituting this value of I
C
in equation (7), we have


V V
CC CE
V I R V R I
B BE E B Th Th
R R
E C

= + + +
+
(
(
(


(or)
R V R V
E E CC CE
V I R V R I
B BE E B Th Th
R R R R
E E C C
= + + +
+ +


From equation (9) we can calculate the value of collector voltage V
CE
for each value of I
B
.

Stability factor (S):

For determining stability factor S for voltage divider bias, consider the Thevenins
equivalent circuit.
Hence, Thevenins equivalent voltage V
Th
is given by

2
1 2
R
V V
CC Th
R R
=
+


and the R
1
and R
2
are replaced by R
B
which is the parallel combination of R
1
and R
2
.

1 2
1 2
R R
R
B
R R
=
+

Applying KVL to the base circuit, we get
( )
V I R V I I R
B B BE B E C Th
= + + +

Differentiating w.r.t. I
C
and considering V
BE
to be independent of I
C
we get,

( )
0
I I
B B
R R R
B E E
I I
C C

= + +



( )
I
B
R R R
E B E
I
C

+ =

I R
B E
I R R
E B C

=
+


We have already seen the generalized expression for stability factor S given by


1
1
S
I
B
I
C

+
=

Substituting value of
I
B
I
C

in the above equation, we get

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194

1
1
S
R
E
R R
E B

+
=
+
+
| |
|
|
\



( )( ) ( )( )
( )
1 1
1
R R R R
E B E B
S
R R R R R
B E E B E


+ + + +
= =
+ + + +

( )
1
1
1
R
B
R
E
S
R
B
R
E

+
= +
+ +
| |
|
|
|
|
|
\

The ratio
R
B
R
E
controls value of stability factor S.

If 1
R
B
R
E
<< then above equation reduces to ( )
1
1 1
1
S

= + =
+
| |
|
\


Practically 0
R
B
R
E
But to have better stability factor S, we have to keep ration
R
B
R
E
as
small as possible.

Stability factor S for voltage divider bias (or) self bias is less as compared to other biasing
circuits studied. So, this circuit is most commonly used.

Stability factor (S):
Stability factor S is given by '
I
C
S
V
BE

I
CO,
constant
It is the variation of I
C
with V
BE
when I
CO
and are considered constant.

We know that, ( ) 1 I I I
B C CO
= + +

( ) 1 I I
C CO
I
B

+
=
and
( )
V I R V I I R
B B BE B E C Th
= + + +

( )
V V R R I R I
BE E B B E C Th
= +

By substituting I
B
in the above equation, we get

( )
( ) 1 I I
C CO
V V R R R I
BE E B E C Th

+
= +
| |
|
|
\



( ) ( )( ) 1 R R I R R I
E B E B C CO
V R I
E C Th

+ + +
= +
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195

( ) ( ) ( ) 1 1 R R I R R I
E B E B CO C
V V
BE Th


+ + + +
= +
(



Differentiating the above equation w.r.t V
BE
with I
CO
and constant, we get


( ) 1
1 0 0
I R R
C B E
V
BE

+ +
= +

(
(
(




( ) 1
I
C
V R R
BE B E

=
+ +



( ) 1
' S
R R
B E

=
+ +


Stability Factor S:
Stability factor S is given by ''
I
C
S

I
CO,
V
BE
constant

We have,
( ) ( )( ) 1 1 R R R R I
E B B E C
V V I
BE CO Th


+ + + +
= +
(
(

(
(



( ) 1
'
R R I
B E C
V V
Th

+ +
= +
(



Where
( )( )
( )
1
'
R R
E B
V I R R I
E B CO CO

+ +
= = +
(
(
(

( ) 1 >> Q
Therefore, we write the above equation in terms of I
C
, we get

( ) 1
' V V V
BE Th
I
C
R R
B E

+
=
+ +
(



Differentiating above equation w.r.t. taking V independent of , we get,
( )
( )
( )
1 '
2
1
' R R V V V V V V R
I
B E BE BE E Th Th C
R R
B E

+ + + +

+ +
(

(



Multiplying numerator and denominator by (1+) we get,


( )( )( )
( ) ( ) ( )
1
1 1 1
' R R V V V
I
B E BE Th C
R R R R
B E B E

+ + +

+ + + + + ( (




( )
( ) ( ) 1 1
' S V V V
BE Th
R R
B E

+
=
+ + + (


( )( )
( )
1
1
R R
B E
S
R R
B E

+ +
=
+ +


`
(

)
Q

Multiplying numerator and denominator by , we get
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196

( )
( ) ( )
( ) 1
1 1
' V V V S
I I S
BE Th C C
R R
B E

= =
+
+ + + (




( )
( ) 1
' V V V
BE Th
I
C
R R
B E

+
=
+ +
| |
|
| (

\
Q
( ) 1
"
I I S
C C
S

=
+
= where
1
1
S
R
E
R R
E B

+
=
+
+
| |
|
|
\
.
Problems:

5. For the circuit shown in figure, determine the value of I
C
and V
CE
. Assume V
BE
=0.7V and
=100
Solution:
3
5 10
1
10
3 3
10 10 5 10
1 2
3.33
R
V V
B CC
R R
V

= = =
+
+


We know that 3.33 0.7 2.63 V V V
E B BE
V = = =
and
2.63
500
5.26
V
V
E
I
E
R
E
mA = = =
We know that
3
2.63 10
52.08
1 101
I
E
I A
B

= = =
+

and I
C
=I
B
=100x52.08x10
-6
= 5.208mA
Applying KVL to the collector circuit we get

0 V I R V I R
E E CC C C CE
=

V V I R I R
E E CE CC C C
= =10-5.208x10
-3
x1x10
3
- 5.26x10
-3
x500
2.162 V V
CE
=

6. In the circuit shown, if I
C
=2mA and V
CE
=3V, Calculate R
1
and R
3
.















Solution:

From collector circuit,

15 = I
C
R
3
+ V
CE
+ I
E
R
4

= 2x10
- 3
xR
3
+3+( 1+) I
B
x500


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197

3
2 10
3
12 2 10 101 500
3
100
R

= +
5.495
3
R k =
From Base circuit,
2
2
1 2
R
V V
CC
R R
=
+


3
10 10
15
2 3
10 10
1
V
R

+

But, ( ) 0.6 0.6 1
2 4 4
V V V I R I R
BE E E B
= + = + = + +

3
2 10
0.6 101 500 1.61
2
100
V V

= + =

3
1 10
1.61 15
3
10 10
1
R

+


3 3
10 10 93.17 10
1
R

+ =
83.17
1
R k =
7. For the circuit shown below, calculate V
E
, I
E
, I
C
and V
C
. Assume V
BE
=0.7V.

Solution:

From Base circuit,

4 0.7 V V V
BE E E
= + = +
3.3 V V
E
=
3.3 I R
E E
=
3.3
1
3
3.3 10
I mA
E
= =

But I
E
=I
B
+I
C
= (1+)I
B


Assume =100,
1
0.0099
101
mA
I mA
B
= =
I
C
=I
B
= 100x0.0099mA = 0.99mA

From Collector circuit,

10 100 0.99 4.7 5.347 V I R mA K
C C C
V = = =

Bias Compensation Techniques:

The biasing circuits provide stability of operating point in case variations in the transistor
parameters such as I
CO
, V
BE
and .

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198

The stabilization techniques refer to the use of resistive biasing circuits which permit I
B
to
vary so as to keep I
C
relatively constant.

On the other hand, compensation techniques refer to the use of temperature sensitive
devices such as diodes, transistors, thermistors, sensistors etc., to compensate for the variation in
currents. Sometimes for excellent bias and thermal stabilization, both stabilization as well as
compensation techniques are used.

The following are some compensation techniques:

1) Diode compensation for instability due to V
BE
variation.
2) Diode compensation for instability due to I
CO
variation.
3) Thermistor compensation.
4) Sensistor compensation.

1) Diode compensation for instability due to V
BE
variation:

For germanium transistor, changes in I
CO
with temperature contribute more serious
problem than for silicon transistor.

On the other hand, in a silicon transistor, the changes of V
BE
with temperature possesses
significantly to the changes in I
C
.

A diode may be used as compensation element for variation in V
BE
(or) I
CO
.

The figure below shows the circuit of self bias stabilization technique with a diode
compensation for V
BE
. The Thevenins equivalent circuit is shown in figure.


















Fig. Self bias with stabilization and compensation Fig. Thevenins equivalent circuit

The diode D used here is of the same material and type as the transistor. Hence the
voltage V
D
across the diode has same temperature coefficient (-2.5mV/
o
C) as V
BE
of the transistor.
The diode D is forward biased by the source V
DD
and resistor R
D
.

Applying KVL to the base circuit, we get
0 V I R V I R V
B BE E E D Th Th
+ + + =


( )
V V V I R R I I
BE D B E E C Th Th
+ = + + . (1)

But ( ) 1 I I I
B C CO
= + + ... (2)

From equation (1), we get

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( )
V V V R I R R I
BE D E E B C Th Th
+ = + +

Substituting the value of I
B
from equation (2), we get


( )
( ) 1 I I
C CO
V V V R I R R
BE D E E C Th Th

+
+ = + +
| |
|
|
\

( ) ( )
( )
( )
1 V V V R I R R I I R R
BE D E E E C C CO Th Th Th
+ = + + + +
( )
( )
( )
( )
( )
1 1 V V V I R R I R R
BE D E E CO C Th Th Th
+ = + + = + +
( )
( )
( )
( )
1
1
V V V I R R
BE D E CO Th Th
I
C
R R
E Th

+ = + +
=
+ +
(3)

Since variation in V
BE
with temperature is the same as the variation in V
D
with temperature,
hence the quantity (V
BE
-V
D
) remains constant in equation (3). So the current I
C
remains constant
in spite of the variation in V
BE
.

2) Diode compensation for instability due to I
CO
variation:

Consider the transistor amplifier circuit with diode D used for compensation of variation in
I
CO
. The diode D and the transistor are of the same type and same material.




In this circuit diode is kept in reverse biased condition.

The reverse saturation current I
O
of the diode will increase with temperature at the same as
the transistor collector saturation current I
CO
.

From figure
V V V
BE CC CC
I
R R

= = constant.

The diode D is reverse biased by V
BE
. So the current through D is the reverse saturation
current I
O
. Now base current I
B
=I-I
O


But ( ) 1 I I I
B C CO
= + +
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( )
( ) 1 I I I I
C O CO
= + +

If >>1, I I I I
C O CO
+

In the above expression, I is almost constant and if I
O
of diode D and I
CO
of transistor track
each other over the operating temperature range, then I
C
remains constant.


3) Thermistor Compensation:

This method of transistor compensation uses temperature sensitive resistive elements,
thermistor rather than diodes (or) transistors:

It has a negative temperature coefficient, its resistance decreases exponentially with
increasing temperature as shown in the figure.
Slope of this curve
R
T
T

R
T
T

is the temperature coefficient for thermistor, and

the slope is negative. So we can say that thermistor
has negative temperature coefficient of resistance.






Figure below shows thermistor compensation technique.

As shown in figure, R
2
is replaced by thermistor R
T
in self bias circuit.



Fig. Thermistor compensation technique.

With increase in temperature, R
T
decreases. Hence voltage drop across it also decreases.
This voltage drop is nothing but the voltage at the base with respect to ground. Hence, V
BE

decreases which reduces I
B
. This behavior will tend to offset the increase in collector current with
temperature.
We know, ( ) 1 I I I
B C CO
= + +
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201
In this equation, there is increase in I
CBO
and decreases in I
B
which keeps I
C
almost
constant.
Consider another thermistor compensation technique shown in figure. Here, thermistor is
connected between emitter and V
CC
to minimize the increase in collector current due to change in
I
CO
, V
BE
(or) with temperature.



Fig. Thermistor compensation technique.

I
C
increase with temperature and R
T
decreases with increase in temperature. Therefore,
current flowing through R
E
increases, which increases the voltage drop across it. Emitter to Base
junction is forward biased. But due to increase in voltage drop across R
E
, emitter is made more
positive, which reduces the forward bias voltage V
BE
. Hence, base current reduces.
I
C
is given by, ( ) 1 I I I
B C CO
= + +
As I
CBO
increases with temperature, I
B
decreases and hence I
C
remain fairly constant.

4) Sensistor Compensation:

This method of transistor compensation uses sensistor, which is temperature sensitive
resistive element.
Sensistor has a positive temperature coefficient, i.e., its resistance increases exponentially
with increasing temperature.
Slope of this curve
R
T
T

R
T
T

is the temperature coefficient for sensistor, and the

slope is positive.

So we can say that sensistor has positive temperature
coefficient of resistance.


As shown in figure R
1
is replaced by sensistor R
T
in self bias
circuit.

As temperature increases, R
T
increases which decreases the current flowing through it. Hence
current through R
2
decreases which reduces the voltage drop across it.

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Fig. Sensistor compensation technique.

As voltage drop across R
2
decreases, I
B
decreases. It means, when I
CBO
increases with
increase in temperature, I
B
reduces due to variation in V
BE
, maintaining I
C
fairly constant.


Thermal Runaway:

The collector current for the CE circuit is given by
( ) 1 I I I
B C CO
= + +

The three variables in the equation, , I
B
and I
CO
increase with rise in temperature. In
particular, the reverse saturation current (or) leakage current I
CO
changes greatly with
temperature. Specifically, it doubles for every 10
o
C rise in temperature.

The collector current I
C
causes the collector-base junction temperature to rise which, in
turn, increase I
CO
, as a result I
C
increase still further, which will further rise the temperature at the
collector-base junction. This process is cumulative and it is referred to as self heating.
The excess heat produced at the collector-base junction may even burn and destroy the
transistor. This situation is called Thermal Runaway of the transistor.

Thermal Resistance:

Transistor is a temperature dependent device.
In order to keep the temperature within the limits, the heat generated must be dissipated
to the surroundings.

Most of the heat within the transistor is produced at the collector junction.

If the temperature exceeds the permissible limit, the junction is destroyed.

For Silicon transistor, the temperature is in the range 150
o
C to 225
o
C.
For Germanium, it is between 60
o
C to 100
o
C.
Let T
A
o
C be the ambient temperature i.e., the temperature of surroundings air around
transistor and T
j
o
C, the temperature of collector-base junction of the transistor.

Let P
D
be the power in watt dissipated at the collector junction.
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The steady state temperature rise at the collector junction is proportional to the power
dissipated at the junction. It is given by
T T T P
j D A
= = Where = constant of proportionality
The , which is constant of proportionality, is referred to as thermal resistance.

T T
j A
P
D

=
The unit of , the thermal resistance, is
o
C/watt.
The typical values of for various transistors vary from 0.2
o
C/watt for a high power
transistor to 1000
o
C/watt for a low power transistor.

Heat Sink:

As power transistors handle large currents, they always heat up during operation.

The metal sheet that helps to dissipate the additional heat from the transistor is known as
heat sink. The heat sink avoids the undesirable thermal effect such as thermal runaway.
The ability of heat sink depends on the material used, volume, area, shape, constant
between case and sink and movement of air around the sink.
The condition for Thermal Stability:

As we know, the thermal runaway may even burn and destroy the transistor, it is necessary
to avoid thermal runaway.
The required condition to avoid thermal runaway is that the rate at which heat is released
at the collector junction must not exceed the rate at which the heat can be dissipated. It is given
by
P P
C D
T T
j j

<

(1)
But we know, from thermal resistance
T T P
j D A
= .. (2)
Differentiating equation (2) w.r.t. T
j
we get
1
P
D
T
j

1
P
D
T
j

. (3)
Substituting equation (3) in equation (1), we get

1
P
D
T
j

<

(4)
This condition must be satisfied to prevent thermal runaway.
By proper design of biasing circuit it is possible to ensure that the transistor cannot
runaway below a specified ambient temperature (or) even under any condition.
Let us consider voltage divider bias circuit for the analysis.

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204


Fig. Voltage divider bias circuit.

From fig., P
C
= heat generated at the collector junction.
= DC power input to the circuit the power lost as I
2
R
in R
C
and R
E
.
If we consider I I
E C
we get

( )
2
P V I I R R
E C CC C C C
= + .. (6)
Differentiating equation (6) w.r.t I
C
we get

( )
2
P
C
V I R R
E CC C C
I
C

= +

.. (7)
From equation (4)

1
.
P I
C C
I T
j C


<

.. (8)
In the above equation
I
C
T
j

can be written as
' "
I I V
C CO BE
S S S
T T T T
j j j j

= + +

. (9)
Since junction temperature affects collector current by affecting I
CO
, V
BE
, and . But as we
are doing analysis for thermal runaway the affect of I
CO
dominates. Thus we can write

I I
C CO
S
T T
j j

=

.. (10)
As the reverse saturation current for both Silicon and Germanium increases about 7
percent per
o
C, we can write
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205
0.07
I
CO
I
CO
T
j

. (11)
Substituting equation (11) in equation (10), we get
0.07
I
C
S I
CO
T
j

. (12)
Substituting equations (7) and (12) in equation (8), we get

( )
( )
( )
1
2 0.07 V I R R S I
E CC C C CO

+ <
(

.. (13)
As S, I
CO
and are positive; we see that the inequality in equation (13) is always satisfied
provided that the quantity in the square bracket is negative.
( )
2 V I R R
E CC C C
< +
( )
2
V
CC
I R R
E C C
< + .. (14)
Applying KVL to the collector circuit of voltage divider bias circuit we get,
( )
V V I R R
E CE CC C C
= +
( )
I I
E C
Q
( )
I R R V V
E C C CC CE
+ =
Substituting the value of
( )
I R R
E C C
+ in equation (14), we get

2
V
CC
V V
CC CE
=

2
V
CC
V V
CC CE
<

2
V
CC
V
CE
<
Thus if
2
V
CC
V
CE
< , the stability is ensured.
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