Seminar Report ‘03 Integrated Power Electronics

Module

INTRODUCTION

In power electronics, solid-state electronics is used for the control and

conversion of electric power .The goal of power electronics is to realize
power conversion from electrical source to an electrical load in a highly
efficient, highly reliable and cost effective way. Power electronics modules
are key units in a power electronics system. These modules contain
integration of power switches and associated electronic circuitry for drive
control and protection and other passive components.

During the past decades, power devices underwent generation-by-

generation improvements and can now handle significant power density. On
the other hand power electronics packaging has not kept pace with the
development of semiconductor devices. This is due to the limitations of
power electronics circuits. The integration of power electronics circuit is
quite different from that of other electronics circuits. The objective of power
electronics circuits is electronics energy processing and hence require high
power handling capability and proper thermal management.

Most of the currently used power electronic modules are made by

using wire-bonding technology [1,2]. In these packages power semi
conductor dies are mounted on a common substrate and interconnected with
wire bonds. Other associated electronic circuitries are mounted on a multi
layer PCB and connected to the power devices by vertical pins. These wire
bonds are prone to resistance, parasitic and fatigue failure. Due to its two
dimensional structure the package has large size. Another disadvantage is the
ringing produced by parasitic associated with the wire bonds.
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Seminar Report ‘03 Integrated Power Electronics
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To improve the performance and reliability of power electronics

packages, wire bonds must be replaced. The researches in power electronic
packaging have resulted in the development of an advanced packaging
technique that can replace wire bonds. This new generation package is
termed as ‘Integrated Power Electronics Module’ (IPEM) [1]. In this, planar
metalization is used instead of conventional wire bonds. It uses a three-
dimensional integration technique that can provide low profile high-density
systems. It offers high frequency operation and improved performance. It
also reduces the size, weight and cost of the power modules.

Dept. of AEI 2 MESCE Kuttippuram

Seminar Report ‘03 Integrated Power Electronics
Module

FEATURES OF IPEMS

The basic structure of an IPEM contains power semi conductor

devices, control/drive/protection electronics and passive components. Power
devices and their drive and protection circuit is called the active IPEM and
the remaining part is called passive IPEM. The drive and protection circuits
are realized in the form of hybrid integrated circuit and packaged together
with power devices. Passive components include inductors, capacitors,
transformers etc.

The commonly used power switching devices are MOSFETs and

IGBTs [3]. This is mainly due to their high frequency operation and low on
time losses. Another advantage is their inherent vertical structure in which
the metalization electrode pads are on two sides. Usually the gate source pads
are on the top surface with non-solderable thin film metal Al contact. The
drain metalization using Ag or Au is deposited on the bottom of chip and is
solderable. This vertical structure of power chips offers advantage to build
sand witch type 3-D integration constructions.

In IPEM integration of active part is done by using ‘Embedded Power

Technology’ [4] and that of passive part is done by using ‘spiral Integration
Technology’ [5]. Embedded power technology provides a high-density
integration of active components with negligible parasitic effects, and spiral
integration of passive components with a large amount of volume reduction.

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Seminar Report ‘03 Integrated Power Electronics
Module
To describe these advanced integration techniques we can use a
typical power electronics system. A Distributed Power Supply (DPS) system
can be used for this purpose

DPS SYSTEM

The complete circuit diagram of DPS system is shown in figure 1. In

this DC-DC converter, the primary dc supply is split in with the help of
capacitors and then inverted to high frequency ac by MOSFET by half bridge
inverter. The resonant capacitor voltage is transformer coupled, diode
rectified and then filtered to get the output dc voltage [6].

Fig 1: DPS System

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Seminar Report ‘03 Integrated Power Electronics
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The active part of the DPS system contains a power switching stage
with two MOSFETs and their drive circuit. The drive circuit contains high
and low drivers with over current protection and the drive control logic. The
passive part contains capacitors, transformer and current doubling inductors.

The active and passive parts of DPS system can be implemented using
the above mentioned techniques and are discussed in the following part.

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Seminar Report ‘03 Integrated Power Electronics
Module

EMBEDDED POWER TECHNOLOGY

Embedded power technology is a three-dimensional, multilayer

integrated packaging technology. Figure 2 shows the conceptual structure of
an embedded power packaged module.

FIG 2: Conceptual structure of embedded power module

It consists of three parts: embedded power stage, electronics circuitry

and base substrate, which are soldered together to build a module. The
electronics circuitry (components in figure) includes gate drive, control and
protection components. A hybrid (thick film) drive circuitry with high
density interconnect is employed to shrink the module size.

Base substrate

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Seminar Report ‘03 Integrated Power Electronics
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The base substrate provides electrical interconnection and thermal
path of power chips. An Al2O3 or AlN direct bonded copper (DBC)
substrate with 25mil ceramic and 10mil thick copper is used as the base
substrate. It is bonded to a 3mm thick heat spreader to improve thermal
management and to provide suitable mechanical stability.

Embedded Power stage

The core element in this structure is the embedded power stage that
comprises of ceramic frame, power chips (Si in figure), isolation dielectric
and metalization circuit. Inside the power stage, multiple bare power semi
conductor dies, featuring vertical semi conductor structures with topside and
backside electrode pads, are buried in a ceramic frame.

Planar metallization

In this module, wire bonds are replaced b metalization using copper

layers. It is shown in figure 3. Here the deposited Cu pattern layers connect
the Al pads of the power chips with external circuitry.

Plated Cu
Dielectric and Sputtered Cu
passivation Sputtered Ni
Sputtered Cr/Ni
Al pad on chip
Si
. IGBT or MOSFET chip

Drain contact

FIG 3: contact scheme in embedded power connection

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Seminar Report ‘03 Integrated Power Electronics
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To accomplish this metallurgical interconnect the under bump

metalization (UBM) schemes are employed in our approach. These UBM
schemes such as Ti-Ni-Cu or Cr-Ni-Cu deposited layers provide low film
stress with good adhesive and electrical/ thermal conduction. For carrying
high current an electro plated Cu layer is added to this thin Cu layer of UBM.
The process flow chart of embedded power module is given in figure 4.
Table 1 summarizes the fabrication steps. They are ceramic cutting, device
mounting, dielectric printing and metalization [6]. One of the features of this
technology is its mask based processing. The metalized base substrate is
patterned using photolithography, the dielectric polymer is applied with a
screen-printing method, and the chip-carrier ceramic frame is fabricated by
computer controlled laser machining.

Ceramic
cutting

Si
Device
mount

Dielectric
pattern

Metalization
pattern
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Seminar Report ‘03 Integrated Power Electronics
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Figure 4: Process flow chart of embedded power

Steps Description
Ceramic Openings in flat Al2O3 or AlN plate by laser cutting
frame
Die mount Dispense dielectric
Dielectric Void free precision dielectric pattern, good adhesion by
pattern screen - printing or/and photolithography.
Metalization Adhesion, barrier, low stress, low resistance by
sputtering of Ti/Cr-Cu thin film. Thicker (>5mil), low
stress, low resistance, solderable, precision pattern by
electroplating of Cu, etching

Table1: processing step for embedded power stage.

By assembling the three parts, i.e. the substrate, the power stage and the gate
driver, we get the active module. It has a substrate area of 28.5 × 27.3mm. The
exploded view of active IPEM is shown in figure 5.

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Seminar Report ‘03 Integrated Power Electronics
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Fig.5: Three Dimensional View

SPIRAL INTEGRATION TECHNOLOGY

In order to integrate the electromagnetic power passive components used in

power electronic converters in to modules, we use spiral integration technology.
This integration technology for power passives can best be described by first
considering a simple bifilar spiral winding as shown in figure 6.

Fig:6 Spiral Integrated LC structure

This structure consists of two windings (A-C and B-D), separated by a

dielectric material. This resultant structure has distributed inductance and

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Seminar Report ‘03 Integrated Power Electronics
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capacitance and is best described as an electro magnetically integrated LC resonant
structure for which equivalent circuit characteristics depends on the external
connections. Even more complex integrated structures can be realized by adding
more winding layers.

Design of these structures requires deliberate increase and modification of

naturally existing structural impedances, like intra winding capacitance, to realize a
particular equivalent circuit function. These models will provide power densities of
29W/cm3 at frequencies up to 1MHz. In our example of DPS system the passive
part contains decoupling capacitor, current doubler inductors and isolation
transformer. Because of the current doubler configuration, passive IPEM can be
realized by stacking two transformers and using only one DC blocking capacitor as
illustrated in figure 7.

Fig:7 Components of passive IPEM (a) equivalent circuit

( b) Exploded view of passive IPEM (c) prototype

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Seminar Report ‘03 Integrated Power Electronics
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In this circuit, the two magnetic structures i.e. inductors and transformers,
can be integrated in to one physical structure through integrated magnetics
technology. The equivalent magnetizing inductance is used to realize the current
doubler inductors.

The transformers are built with two planar E-cores that share a common I-
core. The ac flux is partially cancelled in the shared I-core. The D C blocking
capacitor is now implemented in only transformer T1 using the hybrid winding
technology. This technology is implemented using Cu traces on both sides of the
winding and a dielectric layer placed in the middle to enhance the capacitive
component of the winding. For this we use a high permittivity ceramic [Er >12000].
The Transformer T2 is a conventional planar low-profile transformer.

To get the complete IPEM, we mount the active and passive IPEMs on a
single ceramic chip carrier with metalization and then bonded to the heat spreader.
Figure 8 shows an IPEM based DPS system and its wire bonded version.

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Seminar Report ‘03 Integrated Power Electronics
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Fig:8 Comparison of wire bond and IPEM

PERFORMANCE OF IPEM

The performance of IPEM can be evaluated using various parameters. A

comparison of IPEM and wire bonding technology is given in table 2. As given in
the table, IPEM has achieved 35% reduction of foot print area as compared to the
wire-bonding version. The planar interconnects in IPEM reduces the structural
inductance by a factor of three when compared to the wire bonding. But the
structural capacitance is increased by a factor of five.

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Seminar Report ‘03 Integrated Power Electronics
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Table:2 Comparison of wire bond and IPEM

Parameters Wire bond IPEM

Substrate area (mm2) 40 x 30 28.5 x 27.3
Inductance (nH) 10 3
Capacitance (pF) 4 20
No. of passive 6 1
components
Volume of passives 173 82
No. of terminals 15 5
Volume of terminals 170 5
Total passive volume 343 87
System profile 20 10
System power density 1 X3.6

In IPEM, the volume of passive components is reduced to half of that in

wire bonding and total passive volume is reduced to 1/3rd of that in wire bonding.
Also the system power density is increased by a factor of 3.6.

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Seminar Report ‘03 Integrated Power Electronics
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ADVANTAGES AND DISADVANTAGES

There are several advantages for integrating power electronics system using
the IPEM concept. The main advantages are
1. Modular approach:
This modular approach reduces the design and implementation time cycles as
well as simplifies the assembly process.
2. Improved usage of space
The reduction in volume increases the power density and reduces the profile
of the system.
3. Reduction of components and inter connects.
This improves the system reliability and also increases the speed.
4. Reduction in structural packaging inductance.
It leads to improved electrical performance, which in turn leads to reduced
voltage ringing across the power switches. It increases the switching
frequency.

The main disadvantage of this system is that it is very complex compared to

other 2-D modules. Also it requires efficient combination of a large number of
different technologies.

APPLICATIONS
IPEM can be used for most of the power electronic circuits. Hence it has a
wide range of applications. It includes
• Motor drives
• UPS systems
• Power supplies

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Seminar Report ‘03 Integrated Power Electronics
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• Inverters
• Converters etc.

CONCLUSION

In power electronics modules further improvements in performance,

reliability and cost can be achieved by using IPEMs. Various experiments have
proved its manufacturability and other features of this technology. The impacts of
system integration via IPEM will enable a rapid growth of power electronics that
can be compared to the impacts in computer applications brought about by VLSI
technology.

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Seminar Report ‘03 Integrated Power Electronics
Module

REFERENCES

[1] F.C.Lee, J.D.Van Wyk, D. Boroyevich, G.Q. Lu, Z. Liang and P. Barbosa
“Technology trends towards system in a module in power electronics ”,
IEEE circuits &systems, Vol. 2, No 4, Vth quarter, pp 6-21, 2002.

[2] X. Liu, and G. Q. Lu “Power chip inter connection: from wire bonding to
area bonding,” Advancing microelectronics, Vol. 28.No 4, July/August
2001.

[3] B.K.Bose, “ Modern power electronics “, Jaico Books, pp 8-32

[4] Z. Liang, F.C. Lee, “Embedded power technology for IPEM packaging
applications”, IEEE proceedings on APEC 2001 pp 1057-1061

[5] http:// www.scholar.lib.vt.edu/thesis/avalable

[6] B. G. Streetman, S. Banerjee, ”Solid state electronic devices, PHI,

pp 150-160

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Seminar Report ‘03 Integrated Power Electronics
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ABSTRACT

IPEM is an improved power processing technology through advanced

integration of power electronics components. It provides high frequency synthesis,
resulting in important improvements in performance, size, and cost.

Currently, assemblies of power semiconductor switches and their associated

drive circuitry are available in modules. Though the module contains a small size
power switching part, the associated control, sensing, electro magnetic power
passives and inter connect structures are very bulky. In IPEM, the reduction in size
and weight is provided by planar metalization that allows 3-D integration of power
devices and power passives to increase the power density.

This paper addresses the improvements of power processing technology

through advanced integration of power electronics. The fundamental functions in
electronic power processing, the materials, processes, and integration approaches
and future concepts are explained.

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Seminar Report ‘03 Integrated Power Electronics
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CONTENTS

• Introduction 1

• Features of IPEM 3

• DPS system 4

• Embedded power technology 6

• Spiral integration technology 10

• Performance of IPEM 12

• Advantages and disadvantages 14

• Applications 14

• Conclusion 15

• References 16

Dept. of AEI 19 MESCE Kuttippuram

Seminar Report ‘03 Integrated Power Electronics
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ACKNOWLEDGEMENT

I extend my sincere gratitude towards Prof . P.Sukumaran Head of

Department for giving us his invaluable knowledge and wonderful technical
guidance

I express my thanks to Mr. Muhammed kutty our group tutor and

also to our staff advisor Ms. Biji Paul for their kind co-operation and
guidance for preparing and presenting this seminar.

I also thank all the other faculty members of AEI department and my
friends for their help and support.

Dept. of AEI 20 MESCE Kuttippuram