How PCI Works: Hop On The Bus, Gus
How PCI Works: Hop On The Bus, Gus
by Jeff Tyson
There are a lot of incredibly complex components in a computer. And all of these parts need
to communicate with each other in a fast and efficient manner. Otherwise, the amazing
speed and capabilities of each individual component is lost in the whole.
That's where the bus comes in. Essentially, a bus is the channel or path between the
components in a computer. There are many different types of buses. In this edition of
HowStuffWorks, you will learn about some of those buses. We will concentrate on the bus
known as the Peripheral Component Interconnect (PCI). We'll talk about what PCI is, how
it operates and how it is used, as well as about past and future bus technologies.
There have been a couple of key reasons for this bus longevity:
As the speed of central processing units (CPUs) and RAM increased, it became more
important to isolate the path between processor and memory. A replacement for the
standard system bus, called Dual Independent Bus (DIB), was created. DIB replaced the
single system bus with a frontside bus and a backside bus. The backside bus had one
purpose: to provide a direct, fast channel between the CPU and the Level 2 cache. The
frontside bus connected the system memory, via the memory controller, to the CPU, and the
other buses to the CPU and system memory.
The illustration above shows how the various buses connect to the CPU.
The other main bus, the shared bus, is for connecting additional components to the
computer. It is called a shared bus because it lets multiple devices access the same path to
the CPU and system memory. These devices includes such items such as:
• Modem
• Hard drive
• Sound card
• Graphics card
• Controller card
• Scanner
The original PC bus operated at 4.77 MHz (million cycles per second) and was 8 bits wide,
meaning it could process 8 bits of data in each cycle. In 1982, it improved to 16 bits at 8 MHz
and officially became known as ISA. This bus design is capable of passing along data at a
rate of up to 16 MBps (megabytes per second), fast enough even for many of today's
applications.
As technology advanced and the ISA bus grew long in the tooth, other buses were
developed. Key among these were Extended Industry Standard Architecture (EISA) --
which was 32 bits at 8 MHz-- and Vesa Local Bus (VL-Bus). The cool thing about VL-Bus
(named after VESA, the Video Electronics Standards Association, which created the
standard) is that it was 32 bits wide and operated at the speed of the local bus, which was
normally the speed of the processor itself. The VL-Bus essentially tied directly into the CPU.
This worked okay for a single device, or maybe even two. But connecting more than two
devices to the VL-Bus introduced the possibility of interference with the performance of the
CPU. Because of this, the VL-Bus was typically used only for connecting a graphics card, a
component that really benefits from high-speed access to the CPU.
PCI can connect more devices than VL-Bus, up to five external components. Each of the five
connectors for an external component can be replaced with two fixed devices on the
motherboard. Also, you can have more than one PCI bus on the same computer, although
this is rarely done. The PCI bridge chip regulates the speed of the PCI bus independently of
the CPU's speed. This provides a higher degree of reliability and ensures that PCI-hardware
manufacturers know exactly what to design for.
PCI originally operated at 33 MHz using a 32-bit-wide path. Revisions to the standard include
increasing the speed from 33 MHz to 66 MHz and doubling the bit count to 64. Currently,
PCI-X provides for 64-bit transfers at a speed of 133 MHz for an amazing 1-GBps (gigabyte
per second) transfer rate!
PCI cards use 47 pins to connect (49 pins for a mastering card, which can control the PCI
bus without CPU intervention). The PCI bus is able to work with so few pins because of
hardware multiplexing, which means that the device sends more than one signal over a
single pin. Also, PCI supports devices that use either 5 volts or 3.3 volts.
Although Intel proposed the PCI standard in 1991, it did not achieve popularity until the
arrival of Windows 95 (in 1995). This sudden interest in PCI was due to the fact that
Windows 95 supported a feature called Plug and Play (PnP), which we'll talk about in the
next section.
• PnP BIOS - The core utility that enables PnP and detects PnP devices. The BIOS
also reads the ESCD for configuration information on existing PnP devices.
• Extended System Configuration Data (ECSD) - A file that contains information
about installed PnP devices.
• PnP operating system - Any operating system, such as Windows 95/98/ME, that
supports PnP. PnP handlers in the operating system complete the configuration
process started by the BIOS for each PnP device.
PnP automates several key tasks that were typically done either manually or with an
installation utility provided by the hardware manufacturer. These tasks include the setting of:
While PnP makes it much easier to add devices to your computer, it is not infallible.
Variations in the software routines used by PnP BIOS developers, PCI device manufacturers
and Microsoft have led many to refer to PnP as "Plug and Pray." But the overall effect of PnP
has been to greatly simplify the process of upgrading your computer to add new devices or
replace existing ones.
How It Works
Let's say that you have just added a new PCI-based sound card to your Windows 98
computer. Here's an example of how it would work.
1. You open up your computer's case and plug the sound card into an empty PCI slot
on the motherboard.
What exactly does the future hold for PCI and PnP? Read on to see what's just around the
corner.
All Aboard
As processor speeds steadily climb in the GHz range, many companies are working
feverishly to develop a next-generation bus standard. Many feel that PCI, like ISA before it, is
fast approaching the upper limit of what it can do.
All of the proposed new standards have something in common. They propose doing away
with the shared-bus technology used in PCI and moving to a point-to-point switching
connection. This means that a direct connection between two devices (nodes) on the bus is
established while they are communicating with each other. Basically, while these two nodes
are talking, no other device can access that path. By providing multiple direct links, such a
bus can allow several devices to communicate with no chance of slowing each other down.
Intel has announced 3GIO (Third Generation I/O), a proposed standard that industry experts
believe will compete with HyperTransport to replace PCI. Intel's plans for 3GIO include:
3GIO is still in the preliminary stages of specification and has a way to go before it can be
considered a standard. But the emphasis with 3GIO, as well as with HyperTransport and
Infiniband, is to move away from the bus-based system and toward a direct-connection
system. Even so, ISA is still in use two decades after its inception, and PCI is expected to
hang around for a long time yet.