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Introduction To Self Study

The document discusses the TMS320C64xx digital signal processor (DSP). It has a 256-bit VLIW architecture with dual 32-bit buses and a clock speed ranging from 300-1000 MHz. The CPU contains two sets of functional units, each with four units: M (multiplication), L (logic/arithmetic), S (logic/shifts), and D (data addressing). It is capable of up to eight 8-bit multiply-accumulate operations per cycle and has 64 32-bit registers. Peripherals of the TMS6455 include HPI, I2C, McASP, McBSP, PCI, timers, and power-down logic. Manuals for the peripherals and

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Shivam Shukla
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98 views3 pages

Introduction To Self Study

The document discusses the TMS320C64xx digital signal processor (DSP). It has a 256-bit VLIW architecture with dual 32-bit buses and a clock speed ranging from 300-1000 MHz. The CPU contains two sets of functional units, each with four units: M (multiplication), L (logic/arithmetic), S (logic/shifts), and D (data addressing). It is capable of up to eight 8-bit multiply-accumulate operations per cycle and has 64 32-bit registers. Peripherals of the TMS6455 include HPI, I2C, McASP, McBSP, PCI, timers, and power-down logic. Manuals for the peripherals and

Uploaded by

Shivam Shukla
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Anupama KR & Meetha.V.

Shenoy
EMBEDDED SYSTEM DESIGN 8051
SELF STUDY: TMS 6455
PERIPHERALS




The TMS320C64xx is Texas Instruments fastest (currently) fixed-point DSP family. It's part of
the TMS320C6x DSP family, which is in turn part of the TMS320 family.
It has 256-bit VLIW based on VelociTI instruction set dual bus Harvard architecture.
32-bit data word length
Clock speed ranging from 3001000 MHz
Code compatible with the older C6200 fixed-point family and with the C6700 floating point
family.
The C64xx CPU has two sets of functional units. Each set contains four units and a register
file of 32 32-bit registers. There is a cross path between the sets of functional units.
M - All multiplication operations also include bit-count, rotate, Galois field multiplies,
and bidirectional variable shift hardware.
L - Logic and arithmetic operations - 32/40-bit arithmetic and compare operations
and 32-bit logical operations
S - Logic and arithmetic operations - 32-bit arithmetic operations, 32/40-bit shifts
and 32-bit bit-field operations, 32-bit logical operations, Branches, Constant
generation and Register transfers to/from control register file (.S2 only)
D - Data addressing units - Address calculations, loads and stores, constant
generation and 32 logical operations
64 registers of 32-bit word length
Capable of up to four 16-bit MAC (multiplyaccumulates) per cycle or up to eight 8-bit MAC
per cycle.

Peripherals of TMS 6455
HPI
I2C
McASP
McBSP
PCI
Power-down logic allows reduced clocking
Two 32-bit general-purpose timers
Time events
Count events
Generate pulses
Interrupt the CPU

Important Tips for Self Study
Manual for TMS 6455 processor peripherals is available as separate PDFs per peripheral.
A zipped file containing details of 6455 peripherals and CPU are made available to you with
the course materials.

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