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Experiment: Project 19: Demultiplexer

This document describes a demultiplexer (demux) behavioral model. The demux has one input (I), three select lines (S0, S1, S2), and eight outputs (Y(0) to Y(7)). The values of the select lines determine which output is assigned the input value based on Boolean logic expressions. The demux is implemented using a process with concurrent signal assignments that define the logic for each output.

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34 views1 page

Experiment: Project 19: Demultiplexer

This document describes a demultiplexer (demux) behavioral model. The demux has one input (I), three select lines (S0, S1, S2), and eight outputs (Y(0) to Y(7)). The values of the select lines determine which output is assigned the input value based on Boolean logic expressions. The demux is implemented using a process with concurrent signal assignments that define the logic for each output.

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© © All Rights Reserved
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Experiment:......................................................................................... Expt. No. :..............................

Date: ....................................
............................................................................................................. Page No: ..............................
Project 19: Demultiplexer
--------------------------------------------------------------------------- Company: DBCET
-- Engineer: Santanu Nath
-- ID:DC2011BTE0059
-- Create Date: 19:54:41 03/10/2014
-- Module Name: Demux Behavioral
------------------------------------------------------------------------library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Demux is
Port ( I : in STD_LOGIC;
S0 : in STD_LOGIC;
S1 : in STD_LOGIC;
S2 : in STD_LOGIC;
Y : out STD_LOGIC_VECTOR (7 downto 0));
end Demux;
architecture Behavioral of Demux is
begin
process(I,S0,S1,S2)
begin
Y(0)<=(not S2)AND(NOT S1)AND(NOT S0)AND I;
Y(1)<=(not S2)AND(NOT S1)AND(S0)AND I;
Y(2)<=(not S2)AND(S1)AND(NOT S0)AND I;
Y(3)<=(not S2)AND(S1)AND(S0)AND I;
Y(4)<=S2 AND(NOT S1)AND(NOT S0)AND I;
Y(5)<=S2 AND(NOT S1)AND(S0)AND I;
Y(6)<=S2 AND(S1)AND(NOT S0)AND I;
Y(7)<=S2 AND(S1)AND(S0)AND I;
END PROCESS;
end Behavioral;

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