Dynamic Modeling and Control of Interleaved Flyback Module-Integrated Converter For PV Power Applications

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

3, MARCH 2014 1377


Dynamic Modeling and Control of Interleaved
Flyback Module-Integrated Converter
for PV Power Applications
Fonkwe Fongang Edwin, Student Member, IEEE, Weidong Xiao, Member, IEEE, and
Vinod Khadkikar, Member, IEEE
AbstractFor photovoltaic applications, the interleaved y-
back module-integrated converters (MICs) (IFMICs) operating
in continuous conduction mode (CCM) show the advantages of
high power density, low voltage and current stresses, and low
electromagnetic interference but demonstrate a difcult control
problem compared to the discontinuous conduction mode. This
paper concentrates on the control issues and presents detailed
modeling, in-depth dynamic analysis, and a two-step controller
design approach for IFMIC systems operating in CCM. The
proposed modeling approach is based on the fourth-order system
considering the dynamics of the output CL lter. This realistic
fourth-order system modeling shows the presence of a resonant
peak at a certain frequency, which can cause phase loss and
constraints of system bandwidth. A decoupled two-step controller
design approach is thus proposed to simplify the modeling and
control synthesis in the IFMIC development. The decoupled con-
troller consists of a proportionalintegral controller (based on
the simplied model), followed by a lag term for mitigating the
effect of the resonant peak. A 200-W digitally controlled MIC
prototype is constructed for evaluation purposes. The simulation
and experimental results verify the effectiveness of the proposed
modeling and control approaches.
Index TermsDigital control, modeling, module-integrated
converter (MIC), photovoltaic (PV) power systems, single-phase
grid-connected inverters.
NOMENCLATURE
C
f
Output lter capacitor.
C
pv
Input capacitor.
D Main MOSFET duty cycle.
D
1
D
1
= 1 D.
d
p
Peak duty cycle.
f
sw
Switching frequency of main yback switch.
i
diode
Diode current.
i
Lf
Grid-injected or output current.
i
Lm
Current through magnetizing inductance.
i
prim
Current through transformer primary winding.
Manuscript received November 18, 2012; revised January 16, 2013 and
February 20, 2013; accepted March 29, 2013. Date of publication April 16,
2013; date of current version August 23, 2013.
The authors are with the Masdar Institute of Science and Technology,
Abu Dhabi, UAE (e-mail: [email protected]).
Color versions of one or more of the gures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identier 10.1109/TIE.2013.2258309
i
prim,pk
Peak current through transformer primary wind-
ing within one switching period in discontinuous
conduction mode (DCM).
i
output
Average diode current.
I
PV
Photovoltaic (PV) current.
K
I
Controller integral term.
K
p
Controller proportional term.
L
f
Output lter inductor.
L
m
Magnetizing inductance.
n or n
2
/n
1
Transformer secondary-to-primary turns ratio.
P
avg
Average power injected into the grid.
R
Cf
Filter capacitor equivalent series resistance
(ESR).
R
f
Inductor ESR.
R
pv
Dynamic PV resistance.
T
sw
Switching period.
v
Cf
Filter capacitor voltage.
v
Cpv
Voltage across input capacitor.
V
g
Grid voltage.
V
g,rms
RMS grid voltage.
V
g,th
Threshold grid voltage below which DCM
occurs.
V
inv
Voltage at pseudo-dc link.
V
pv
PV voltage.
Controller lag term time constant.
Grid pulsatance.
I. INTRODUCTION
M
ODULE-INTEGRATED converters (MICs), the so-
called ac modules, or microinverters, are considered to
be the trend of future PV power systems and have drawn signif-
icant research interest recently [1][3]. The moduleconverter
integration provides a parallel conguration and independent
operation of each PV panel. The individual maximum power
point tracking (MPPT) algorithm allows local optimization and
reduces power losses that result from PV module mismatch and
partial shading [4][6]. Furthermore, the parallel structure of
MIC prevents the single point failure, offers plug and play
features, and increases the generation stability [1]. Modeling
and analytical studies have predicted the energy yield improve-
ment when the MIC topologies are widely applied to PV power
systems [7]. However, the research challenge of microinverters
includes conversion efciency, system cost, harmonic injection,
reliability, etc.
0278-0046 2013 IEEE
1378 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Statistics [8] show that inverter failures are the biggest cause
of lost productivity among other components in PV systems.
In [9], the double-frequency decoupling capacitor is considered
the dominant component that limits the system lifetime. It pre-
dicts that replacing electrolytic capacitors with lm capacitors
can prolong the life expectancy of MIC systems. Therefore,
an improved circuit topology has been proposed in [10] and
[11] to minimize the decoupling capacitance and expect high
power density and long life time. Research also focuses on
developing new topologies to improve conversion efciency
[12][17]. Others aim at the objectives of reducing total har-
monic distortion (THD) and/or improving power factor. The
MIC topology review and comparison have been conducted in
[1], [2], [18], and [19]. The study in [1] summarizes power
rating, component count, efciency, and printed circuit board
size of different inverter topologies. In the conclusion, the
pseudo-dc-link inverters are considered to be among the best.
A comprehensive comparison of MIC topologies is reported in
[19], including power rating, component count, switching fre-
quency, soft-switching capability, and efciency. It emphasizes
that the yback MIC (FMIC) topology with current unfolding
shows low component count and potential for high efciency
and reliability.
The topology of FMIC has drawn signicant research atten-
tion in recent years [20][27]. Modied topologies have been
proposed to minimize the decoupling capacitance in FMIC
[10], [11]. Among the studies undertaken thus far on FMIC,
one group focuses on the operation in DCM [24][26], [28],
[29], and another concentrates on the continuous conduction
mode (CCM) [20], [22]. In DCM, if the output lter and
nonideal factor are neglected, the output-current-to-duty-cycle
transfer function is a constant gain, as reported in [22] and
[26]. Therefore, the current control loop is a straightforward
approach and shows little design complexity. The study in [22]
stated that the CCM demonstrates the advantages of higher
power density, lower voltage and current stresses on power
switches, and lower electromagnetic interference (EMI) when
compared to the DCM mode of operation. The appearance of
a notch around the resonant frequency that is caused by the
presence of the CL lter is also reported in [22]; however, no
further investigation is conducted for its mitigation. The system
design is based on a second-order system for modeling and
control purposes, which does not provide the exact behavior
of the overall system. This paper shows that the FMIC system
demonstrates a fourth-order dynamic and a resonant peak at
a particular frequency, which causes phase loss and limits the
system bandwidth. Since the resonant peak cannot be observed
by the simplied second-order modeling, this study focuses on
the high-order representation and control solution to minimize
the impact of the resonance.
This paper focuses on the control issue and presents mod-
eling, controller design, simulation, and experimentation for
investigating the interleaved FMIC (IFMIC) operating in CCM.
Compared to the FMIC, the IFMIC shows the following ad-
vantages: 1) Each converter unit in the IFMIC shares the
load equally; 2) the interleaving operation reduces the input
voltage ripple at switching frequency and the pseudo-dc-link
voltage ripple; and 3) the current sharing reduces the EMI.
Fig. 1. IFMIC with current unfolding.
Section II briey introduces the background about operating
IFMIC in DCM and CCM. The modeling approach is based
on the averaged state-space modeling technique and presented
in Section III. It focuses on the second order at the beginning
and then migrates to the fourth-order analysis considering
the output CL lter. The small-signal ac model shows the
unique system dynamics and control challenges that need to
be considered for the closed-loop design. More particularly,
the system shows a resonant peak which can severely reduce
the phase margin, limiting the system bandwidth and severely
degrading performance. The modeling analysis is followed by
a decoupled two-step controller design approach. In the rst
step, a proportionalintegral (PI) controller is designed based
on the second-order model, and then, a lag term is appended
to mitigate the side effect of the resonant peak. Section IV
illustrates the simulation and experimental results to verify the
modeling and control approach.
II. THEORETICAL BACKGROUND
The schematics of the IFMIC topology are shown in Fig. 1,
where the PV current is drawn from the PV panel and modu-
lated to a full-wave-rectied sinusoidal waveform by switching
Q1 and Q2 at high frequency. The voltage waveform of the
pseudo-dc link is also full-wave-rectied sinusoidal. The gate
signals for Q1 and Q2 are given in an interleaved manner
shifted at 180

, and each half shares the load equally. The


SCR H-bridge comprising Q3Q6 forms a current-unfolding
circuit for injecting sinusoidal ac current into the grid. The
low-cost and reliable SCRs are ideal for this application since
the unfolding bridge is switched at the grid voltage and grid
frequency. To follow the polarity of the grid voltage waveform,
Q4 and Q5 conduct during the positive half cycle, while Q3 and
Q6 conduct for the negative half cycle. A CL lter is applied
at the point of common coupling for attenuating harmonic
injection to the grid.
The current-unfolding IFMIC can operate in either DCM or
CCM. In DCM, the transformer magnetizing current falls to
zero in each switching cycle and demagnetizes the transformer
completely, as shown in Fig. 2. The sum of the switch-on
time T
on
and the falling time T
f
is less than the switching
period T
sw
. The main switch is controlled such that the peak
magnetizing inductance current is contained within a rectied
sinusoidal current envelope. Following the derivations in [21]
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1379
Fig. 2. Magnetizing inductance current waveform in DCM during one grid
cycle.
during any switching period, the relation between the peak
current through the primary winding and the duty cycle is
expressed as
i
prim,pk
(t) =
V
Cpv
L
m
f
sw
d(t) (1)
where i
prim,pk
(t) represents the set of points forming the pri-
mary winding current waveform envelope, as shown in Fig. 2,
and d(t) is dened as
d(t) =d
p
sin(t) (2)
d
p
=
2
_
f
sw
L
m
P
avg
V
Cpv
. (3)
P
avg
indicates the desired power to be injected into the grid,
which can be determined by MPPT. By analyzing the aforemen-
tioned equations, the transfer function of the output current to
duty cycle is a linear gain and indicates a straightforward design
for the current regulation. An open-loop operation is feasible
to force the output current to follow a sinusoidal reference.
Contrary to the DCM operation, the magnetizing inductance
current in CCM experiences an incomplete discharge during
each switching cycle [21]; therefore, the steady-state relation-
ship between the output voltage and input voltage in CCM can
be expressed as [30]
|V
g
|
V
Cpv
=
nD
D
1
. (4)
Depending on the circuit parameters, the IFMIC designed for
CCM occasionally operates at DCM when the instantaneous
power level is low. The boundary condition between DCM
and CCM is given in [22] and expressed as (5). The boundary
condition is the design criterion to distinguish the operation of
DCM or CCM
|V
g,th
| = V
Cpv
_
V
g,rms

1
2f
sw
L
m
P
avg
n
_
. (5)
III. MODELING AND CONTROLLER DESIGN
For modeling, the following assumptions are made.
1) Since the switching frequency is much higher than the
grid frequency, the grid voltage appears as a constant dc
voltage during one switching period. Thus, the ac voltage
can be considered to be a large number of successive dc
voltage levels.
Fig. 3. Representation of the second-order model.
2) An operating point henceforth refers to one couple of
output (instantaneous) voltage and duty cycle for which
the expected instantaneous output current (in steady state)
is obtained.
3) The steady-state average power at switching frequency
is equal to the instantaneous output power at the line
frequency.
4) Shown in Fig. 3, the PV module is modeled as a pure dc
voltage source in series with a resistance, which has been
presented and veried in previous studies [31][33].
5) Considering the relatively low power capacity of the
IFMIC, the grid is modeled as a stiff ac source.
A few terms are dened as follows since they are subse-
quently quoted in the following sections.
1) The small-signal model is a linearized mathemati-
cal model for dynamic analysis and controller design
purpose.
2) The averaged model is formed by the averaged state-
space equations. The effect of switching frequency is ab-
sent in this model, which allows for efcient simulation.
3) The switching model refers to the mathematical model
of the system based on the two independent state-
space equations for each of the switching subintervals
in CCM. It inherently includes the switching frequency
effects.
4) The physical model refers to the system model in
Simulink or other similar simulation software in which
the electrical components are interactively placed, linked
together, and then simulated.
A. Averaged Model Without Considering Output Filter
When the impact of the CLoutput lter on the overall system
dynamics is neglected, the system dynamics can be represented
by (6) and (7) in the turn-on and turnoff subintervals, respec-
tively. Therefore, the averaged model can be derived as (8). The
symbols and variables refer to the equivalent circuit shown in
Fig. 3 and denitions in the nomenclature
_

_
_
dv
Cpv
dt
di
Lm
dt
_
=
_

1
R
pv
C
pv

1
C
pv
1
L
m
0
_ _
v
Cpv
i
Lm
_
+
_
1
R
pv
C
pv
0
0 0
_ _
V
pv
V
g
_
y = i
diode
= [ 0 0 ]
_
v
Cpv
i
Lm
_
(6)
1380 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 4. Comparison of the second-order average and switching models.
_

_
_
dv
Cpv
dt
di
Lm
dt
_
=
_

1
R
pv
C
pv
0
0 0
_ _
v
Cpv
i
Lm
_
+
_
1
R
pv
C
pv
0
0
1
nL
m
_ _
V
pv
V
g
_
y = i
diode
= [ 0
1
n
]
_
v
Cpv
i
Lm
_
(7)
_

_
_
dv
Cpv
dt
di
Lm
dt
_
=
_

1
R
pv
C
pv

D
C
pv
D
L
m
0
_ _
v
Cpv
i
Lm
_
+
_
1
R
pv
C
pv
0
0
D
1
nL
m
_ _
V
pv
V
g
_
y = i
output
= [ 0
D
1
n
]
_
v
Cpv
i
Lm
_
.
(8)
The averaged model is evaluated with the switching model,
as shown in Fig. 4. The circuit parameters for the case study
are listed in Table IV in the Appendix. A good match can be
noticed in the simulation waveforms of V
Cpv
, i
Lm
, and i
output
.
The small-signal output-current-to-duty-cycle transfer func-
tion can be shown to be a second-order system in (9), as shown
at the bottom of the page.
Based on the derivation in (9), a pole-zero map can be plotted
and shown in Fig. 5. The numeric values are recapitulated
and summarized in Table I, showing different operating points.
It is noticeable that the poles move toward the real axis and
the zeros move away from the origin as the instantaneous
output power decreases. Analyzing the pole/zero distribution
and corresponding power conditions, the system demonstrates
a right-half-plane (RHP) zero, indicating a nonminimal phase
characteristic when the operating point is located at 226.03 W.
The system is expected to be more oscillatory for higher grid-
injected instantaneous power levels.
Table II illustrates the performance of unit step response at
the four operating points, which correspond to the denition in
Fig. 5. Pole-zero map for four operating points (second-order model).
TABLE I
POLE-ZERO LOCATIONS FOR FOUR DIFFERENT OPERATING POINTS
TABLE II
SUMMARY OF UNIT STEP RESPONSES FOR FOUR OPERATING POINTS
Table I. It can be observed that: 1) the overshoot is greatest at
the highest instantaneous output power level but decreases as
the output power decreases and 2) the settling time does not
vary signicantly with output power level.
G
i
diode
,d
(s) =
s
_
R
pv
C
pv
D
1
n
_
V
Cpv
+
V
g
n
__
+
_
D
1
n
_
V
Cpv
+
V
g
n
DI
Lm
R
pv
__
s
2
[R
pv
C
pv
L
m
] +sL
m
+D
2
R
pv

I
Lm
n
(9)
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1381
Fig. 6. Comparison of the second-order small-signal and averaged models for
G
op1
, G
op2
, G
op3
, and G
op4
, respectively.
The small-signal model outputs are compared with the av-
eraged model and shown in Fig. 6(a)(d), under the operating
points G
op1
, G
op2
, G
op3
, and G
op4
, respectively. A step duty
cycle change of 0.2% is applied at 0.08 s for all cases. The
models show a good match with the averaged model. Based
on this study, the low damping characteristics appear when
the operating points are in the area at or close to the peak
instantaneous output power.
B. Preliminary Controller Design
The rst controller design approach is based on the second-
order model derived in (9). Based on the low damping operating
points occurring at or close to the peak instantaneous output
power, the transfer function representing the output current
versus the duty cycle is derived as
G
system
=
(2.082 10
7
)s
2
+0.03029s+3.838
(2.01610
7
)s
2
+(2.810
5
)s+0.13
. (10)
It refers to the highest input (PV) voltage, peak grid voltage,
and peak instantaneous power, which are 55 V, 342 V, and
200 W, respectively. This is equivalent to the couple (D; V
g
) =
(36.06%; 342 V). The PI controller is therefore designed and
shown in (11), which yields a system open-loop bandwidth
between 2.5 and 5 kHz. The system phase margin is 78.3

,
shown in the bode diagram in Fig. 7. The controller tuning
is based on the interactive tool, called PIDTOOL provided
by MATLAB for PIderivative (PID) controller design. The
system s-domain model is provided, and then, the user sets the
desired phase margin and bandwidth. The tool then calculates
Fig. 7. Bode plot of compensated system.
Fig. 8. Diagram of closed-loop control system.
Fig. 9. Simulation results for the second-order system in closed loop.
the Kp and Ki parameters to satisfy these objectives if the
performance specication is properly assigned
C = 0.18105 + 85.2486
1
s
. (11)
A feedforward term is added to the controller output for fast
response, which is obtained from the expression in (4). Thus,
Fig. 8 illustrates the closed-loop structure with the feedforward
component. The closed loop works normally when the output
lter dynamic effect is ignored. Shown in Fig. 9, the simulation
1382 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 10. Observation of oscillations in output current with controller applied
to the fourth-order model.
Fig. 11. Fourth-order model.
shows that the output current follows the sinusoidal reference
signal effectively. When the CL lter effect is considered, the
same controller in (11) causes signicant oscillations in the
closed-loop operation, as shown in Fig. 10. The simulation
shows that the predesigned controller fails to regulate the output
current. Thus, a detailed modeling approach and controller
redesign/tuning are required.
C. Fourth-Order Model
The control synthesis based on the simplied second-order
model shows oscillations in the output current. This results
from the output CL lter that shows resonant characteristics.
Therefore, the output lter is considered in the dynamic mod-
eling and shown in Fig. 11. The state-space equations in the
rst and second subintervals are expressed in the following
equations, respectively:
_

_
_

_
di
Lm
dt
dv
Cpv
dt
di
Lf
dt
dv
Cf
dt
_

_
=
_

_
0
1
L
m
0 0

1
C
pv

1
R
pv
C
pv
0 0
0 0
(R
Cf
+R
f
)
L
f
1
L
f
0 0
1
C
f
0
_

_
i
Lm
v
Cpv
i
Lf
v
Cf
_

_+
_

_
0 0
1
R
pv
C
pv
0
0
1
L
f
0 0
_

_
_
V
pv
V
g
_
y = [ 0 0 1 0 ]
_

_
i
Lm
v
Cpv
i
Lf
v
Cf
_

_
(12)
_

_
_

_
di
Lm
dt
dv
Cpv
dt
di
Lf
dt
dv
Cf
dt
_

_
=
_

R
Cf
n
2
L
m
0
R
Cf
nL
m

1
nL
m
0
1
R
pv
C
pv
0 0
R
Cf
nL
f
0
(R
Cf
+R
f
)
L
f
1
L
f
1
nC
f
0
1
C
f
0
_

_
i
Lm
v
Cpv
i
Lf
v
Cf
_

_+
_

_
0 0
1
R
pv
C
pv
0
0
1
L
f
0 0
_

_
_
V
pv
V
g
_
y = [ 0 0 1 0 ]
_

_
i
Lm
v
Cpv
i
Lf
v
Cf
_

_.
(13)
Based on (12) and (13), the averaged model can be devel-
oped and shown in Fig. 12. The fourth-order dynamic system
includes four state variables v
Cpv
, v
Cf
, i
Lf
, and i
Lm
, which
result from the input and output storage units and which are
illustrated in the shadowed boxes. In Fig. 12, the boxes with
dashed lines represent the system inputs, and the duty cycle D
is the control variable.
The outputs of the fourth-order averaged and switching
models are plotted together in Fig. 13 and show a good match.
Thus, the development can be based on the averaged model for
fast simulation. The small-signal model can be expressed in
either the state-space format (14) or as transfer function (15),
as shown at the bottom of the page.
_

_
_

_
d

i
Lm
dt
d v
Cpv
dt
d

i
Lf
dt
d v
Cf
dt
_

_
=
_

_
D
1
R
Cf
n
2
L
m
D
L
m
D
1
R
Cf
nL
m
D
1
1
nL
m

D
C
pv

1
R
pv
C
pv
0 0
D
1
R
Cf
nL
f
0
(R
Cf
+R
f
)
L
f
1
L
f
D
1
1
nC
f
0
1
C
f
0
_

_
_

i
Lm
v
Cpv

i
Lf
v
Cf
_

_
+
_

_
R
Cf
n
2
L
m
I
Lm
+
V
Cpv
L
m

I
Lf
R
Cf
nL
m
+
V
Cf
nL
m

I
Lm
C
pv

R
Cf
nL
f
I
Lm

I
Lm
nC
f
_

d
y = [ 0 0 1 0 ]
_

i
Lm
v
Cpv

i
Lf
v
Cf
_

_
(14)

i
Lf
(s)

d(s)
=
ps
3
+As
2
+Bs +C
s
4
+Es
3
+Fs
2
+Hs +M
(15)
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1383
Fig. 12. Averaged model of the fourth-order system.
Fig. 13. Comparison of the fourth-order averaged and switching models.
The parameters p, A, B, C, E, F, H, and M are derived
and dened in the Appendix. By analyzing (15), the system
shows one RHP zero, two left-half-plane (LHP) zeros, and four
LHP poles. A portion of the pole-zero map for the predened
four operating points is illustrated in Fig. 14. It shows a similar
pattern as the simplied second model because the CL lter
introduces only nondominant poles. The results of the pole-zero
mapping are summarized in Table III. It is worth mentioning
that the output lter introduces two LHP poles whose positions
do not change signicantly as the operating points change.
The step responses are not shown here since they follow
the same pattern for the four operating points, as discussed in
Fig. 14. Portion of the pole-zero map of four operating points.
TABLE III
POLE-ZERO LOCATIONS FOR FOUR DIFFERENT OPERATING POINTS
Section III-A. For the purpose of completeness, the outputs of
the small-signal and averaged models are compared and shown
in Fig. 15(a)(d), representing the operating points of G
op1
,
G
op2
, G
op3
, and G
op4
, respectively. For the comparison, a 0.2%
step change of duty cycle is applied at 0.08 s. The models show
a close match that allows us to develop the controller based on
the linearized model.
Shown in Fig. 16, the bode plot of the fourth-order model
operating point G
op1
is compared with that of the second-order
model at the same operating condition. The fourth-order model
indicates the existing resonant peak at a frequency of 30.6 kHz,
which is introduced by the CL output lter. It adds a sharp
phase drop, thus adding the upper bound to the available control
bandwidth. This also explains the oscillation shown in Fig. 10
and why the predesigned controller fails to regulate the output
current to follow the sinusoidal reference signal.
1384 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 15. Comparison of the fourth-order small-signal and averaged models for
G
op1
, G
op2
, G
op3
, and G
op4
, respectively.
Fig. 16. Comparison of bode plots for the second- and fourth-order models.
D. Controller Design
By simulation, it was found out that the negative effect of the
output CL lter can be mitigated as follows: 1) by increasing
the capacitor ESR (R
Cf
); 2) by increasing coupling inductor
ESR (R
f
); 3) by employing pole-zero cancellation; and 4) by
introducing a damping term in the controller. The rst two
approaches are ignored due the high power losses. The third
approach generally introduces high-frequency components in
the system and indicates an implementation difculty that any
Fig. 17. Structure of closed-loop control system.
Fig. 18. Bode plot of compensated system.
mismatch could seriously degrade the control performance and
damage components. Therefore, the fourth option is chosen
since it appears easy to be implemented by microcontrollers,
tolerant to model uncertainty, and free in loss.
The controller synthesis objective is to mitigate the oscilla-
tions shown in the closed-loop system and keep a reasonable
phase margin to guarantee the systemrobustness. The controller
shall introduce a zero crossing in the magnitude plot around the
region circled in Fig. 16. Even though the crossover frequency
can be chosen along a wide range, it should be noted that an
early crossover reduces the system bandwidth and affects the
regulation performance of the ac grid-injected current. On the
other hand, a late zero crossing causes the low phase margin
and could lead to instability. For this design, we use the same
controller synthesized in Section III-B and append a lag term
at the highlighted region of Fig. 16. The lag term equation
becomes
C
lag
=
1
2.5 10
5
s + 1
. (16)
The closed-loop control diagram becomes Fig. 17, and the
corresponding bode diagram is shown in Fig. 18. It indicates
that the phase margin is 49.4

at a crossover frequency of
3740 Hz.
It is interesting to note that, in the proposed controller, the
product of the PI controller and lag term follows the same
format as the type-II controller discussed in [22]. By comparing
the two controller design approaches, the proposed method
seems to be more general toward adopting other types of
controllers such as PID to be developed in the rst step. In
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1385
Fig. 19. Photograph of prototype.
Fig. 20. Z-domain bode plot of compensated system.
addition, the traditional lag compensator with a zero and a
pole can also be selected to mitigate the resonant peak. The
decoupled two-step controller design approach is a systematic
way and shows the advantage of simplicity and exibility in
controller parameterization.
IV. EXPERIMENTAL EVALUATION
The IFMIC prototype is developed for the evaluation pur-
pose. It is controlled by a dsPIC33FJ16GS502 digital signal
controller. Fig. 19 demonstrates the prototype photograph. The
controller is also implemented with other functions for pro-
tection, phase-locked loop, sine lookup table, etc. By using a
sampling frequency of 85 kHz and the Tustin transformation,
the equivalent Z-domain transfer function for the controller
becomes
C
z
=
0.03458z
2
+ 0.000191z 0.03439
z
2
1.619z + 0.619
. (17)
The Z-domain bode plot of the compensated systemis shown
in Fig. 20. The sampling time delay in the digital controller
results in the phase margin is 8

lower than the analog analysis,


which is shown in Fig. 18.
Fig. 21. Comparison of simulation and experimental results for one operating
point.
A. Transient Verication
In order to evaluate the transient response and verify the
control analysis, a dc source is used to mimic the grid-tied
operation since the ac voltage can be assumed to be a succession
of slowly varying dc voltage levels, as explained in Section II.
The dc voltage can be assigned to different levels to emulate the
various operating points and verify the theoretical derivation
according to the slow moving ac voltage. Fig. 21 shows the
transient response of the closed-loop system for the operating
point, which is equivalent to an input voltage of 10 V, a dc
output voltage of 50 V, and a current reference of 330 mA. The
simulation result shows similar characteristics of the practical
measurements in terms of damping and response speed. The
waveform is shifted slightly for distinguishable comparison.
Both illustrate signicant oscillation at the transient period. The
measured 32-kHz oscillation frequency matches the resonant
frequency, which is indicated in the bode diagram in Fig. 18.
Furthermore, a step change is implemented on the ac output
current reference, as shown in Fig. 22. The simulation and
experimental results follow the same reference change from
0.6 to 1 A.
B. AC Grid-Tied Evaluation
The prototype is then tested with an ac grid where an
autotransformer is the adjustable interface linked to the grid.
Fig. 23 illustrates the measured waveforms of the grid voltage
(blue), the folded voltage at the inverter pseudo-dc link
(cyan), and the injected grid current (pink). Fig. 24 shows
the experimental results at the rated 200-W power level. The
oscilloscope-captured signals include the PV voltage (cyan),
PV current (pink), PV power (red), grid voltage (blue), and
injected grid current (green). The power source is a PV array
simulator (Agilent E4350B).
The IFMIC is tested in different power levels from 25% to
100% of the rated power. The measured current THD and ef-
ciency are demonstrated in Fig. 25(a) and (b), respectively. The
1386 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
Fig. 22. Comparison of simulation and experimental results for i
Lf
reference
change.
Fig. 23. Experimental waveforms for grid voltage, pseudo-dc-link voltage,
and output current for the interleaved yback.
peak efciency is 95.7% when the delivered power is 180 W.
The measured current THD values are under 4% across the full
power span. For the readers reference, the system component
models and cost are presented in Table V of the Appendix. The
aforementioned experimental results support the theoretical
analysis and controller synthesis based on the IFMIC topology
and CCM operation.
V. CONCLUSION
In IFMIC PV systems, the operation in CCM shows a
difcult control problem due to the appearance of a notch
around the resonant frequency, which is introduced by the CL
lter at the grid side. This paper has focused on the present
control issues and has proposed a comprehensive modeling,
analysis, design, and simulation to meet the grid-tied control
Fig. 24. Experimental waveforms for PV voltage, PV current, PV power, grid
voltage, and output current for the interleaved yback.
Fig. 25. Measured efciency and THD at different measured power levels.
performance requirement. Based on the averaged state-space
technique and ignoring the output lter effect, a second-order
model has been developed as the starting point. The simplied
model captures the dominant system dynamics but does not
indicate the oscillation effect, which is caused by the CL output
lter. The derived PI controller results in oscillation and shows
unsatisfactory performance in regulating the output current.
Therefore, a fourth-order model has been developed, showing
the resonant peak introduced by the CL lter. To mitigate
the oscillation, a lag term is appended to the predesigned
controller to form a high-order linear controller. The controller
is implemented with the support of the digital signal controller
dsPIC33FJ16GS502. The system modeling, theoretical anal-
ysis, and controller design are veried experimentally by a
200-W MIC prototype, which is controlled for grid-tied
operation.
APPENDIX
The system parameters and component list are shown in
Tables IV and V, respectively.
EDWIN et al.: DYNAMIC MODELING AND CONTROL OF IFMIC FOR PV POWER APPLICATIONS 1387
p =
R
Cf
I
Lm
nL
f
(18)
A =
I
Lm
nC
f
L
f

n(I
Lm
L
m
R
Cf
C
pv
D
1
R
Cf
R
pv
V
Cpv
) +C
pv
D
1
I
Lf
R
2
Cf
R
pv
C
pv
D
1
R
Cf
R
pv
V
Cf
C
pv
L
f
L
m
R
pv
n
2
(19)
B =
n(C
f
I
Lm
R
Cf
R
pv
D
2
C
f
D
1
I
Lm
R
Cf
R
pv
D I
Lm
L
m
+C
f
D
1
R
Cf
V
Cpv
+C
pv
D
1
R
pv
V
Cpv
)
C
f
C
pv
L
f
L
m
R
pv
n
2
+
_
C
f
D
1
R
Cf
V
Cf
+C
pv
D
1
R
pv
V
Cf
C
f
D
1
I
Lf
R
2
Cf
C
pv
D
1
I
Lf
R
Cf
R
pv
_
C
pv
L
f
L
m
R
pv
n
2
(20)
C =
n(D
1
V
Cpv
+D
2
I
Lm
R
pv
+D
1
DI
Lm
R
pv
) D
1
V
Cf
+D
1
I
Lf
R
Cf
C
f
C
pv
L
f
L
m
R
pv
n
2
(21)
E =
R
Cf
+R
f
L
f
+
1
C
pv
R
pv
+
D
1
R
Cf
L
m
n
2
(22)
F =
1
C
f
L
f
+
D
2
C
pv
L
m
+
(R
Cf
+R
f
)
_
1
C
pv
R
pv
+
D
1
R
Cf
L
m
n
2
_
L
f
+
D
2
1
C
f
L
m
n
2

D
2
1
R
2
Cf
L
f
L
m
n
2
+
D
1
R
Cf
C
pv
L
m
R
pv
n
2
(23)
H =
(L
m
+C
f
D
2
R
Cf
R
pv
+C
f
D
2
R
f
R
pv
)n
2
+D
2
1
L
f
+C
f
D
1
R
2
Cf
C
f
D
2
1
R
2
Cf
C
f
C
pv
L
f
L
m
R
pv
n
2
+
C
f
D
1
R
Cf
R
f
+C
pv
D
1
R
Cf
R
pv
C
pv
D
2
1
R
Cf
R
pv
+C
pv
D
2
1
R
f
R
pv
C
f
C
pv
L
f
L
m
R
pv
n
2
(24)
M =
D
2
1
R
f
D
2
1
R
Cf
+D
1
R
Cf
+D
2
R
pv
n
2
C
f
C
pv
L
f
L
m
R
pv
n
2
(25)
TABLE IV
IFMIC CIRCUIT PARAMETERS
TABLE V
IFMIC MAIN COMPONENT COUNT AND COST
Following the modeling discussion in Section III, the fourth-
order model parameters in (15) are dened in (18)(25), shown
at the top of the page.
REFERENCES
[1] Q. Li and P. Wolfs, A review of the single phase photovoltaic module
integrated converter topologies with three different DC link congura-
tions, IEEE Trans. Power Electron., vol. 23, no. 3, pp. 13201333,
May 2008.
[2] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, A review of single-phase
grid-connected inverters for photovoltaic modules, IEEE Trans. Ind.
Appl., vol. 41, no. 5, pp. 12921306, Sep./Oct. 2005.
[3] B. Hu and S. Sathiakumar, Interleaving technique of series connected
module-integrated converters for PV systems: Novel approach and system
analysis, in Proc. IEEE ISIE, 2012, pp. 17851790.
[4] W. Xiao, N. Ozog, and W. G. Dunford, Topology study of photovoltaic
interface for maximum power point tracking, IEEE Trans. Ind. Electron.,
vol. 54, no. 3, pp. 16961704, Jun. 2007.
[5] N. Femia, G. Lisi, G. Petrone, G. Spagnuolo, and M. Vitelli, Distributed
maximum power point tracking of photovoltaic arrays: Novel approach
and system analysis, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2610
2621, Jul. 2008.
[6] G. Petrone, G. Spagnuolo, and M. Vitelli, An analog technique for
distributed MPPT PV applications, IEEE Trans. Ind. Electron., vol. 59,
no. 12, pp. 47134722, Dec. 2012.
[7] G. Petrone and C. A. Ramos-Paja, Modeling of photovoltaic elds in
mismatched conditions for energy yield evaluations, Elect. Power Syst.
Res., vol. 81, no. 4, pp. 10031013, Apr. 2011.
[8] A. G. Golnas, PV system reliability: An operators perspective, IEEE J.
Photovolt., vol. 3, no. 1, pp. 416421, Jan. 2013.
[9] S. Harb and R. S. Balog, Reliability of candidate photovoltaic module-
integrated-inverter (PV-MII) topologiesA usage model approach,
IEEE Trans. Power Electron., vol. 28, no. 6, pp. 30193027, Jun. 2013.
[10] H. Hu, S. Harb, N. Kutkut, I. Batarseh, and Z. J. Shen, A review of power
decoupling techniques for microinverters with three different decoupling
capacitor locations in PV systems, IEEE Trans. Power Electron., vol. 28,
no. 6, pp. 27112726, Jun. 2013.
[11] H. Hu, S. Harb, N. H. Kutkut, Z. J. Shen, and I. Batarseh, A single-stage
microinverter without using electrolytic capacitors, IEEE Trans. Power
Electron., vol. 28, no. 6, pp. 26772687, Jun. 2013.
[12] N. Kasa, T. Iida, and L. Chen, Flyback inverter controlled by sensorless
current MPPT for photovoltaic power system, IEEE Trans. Ind. Elec-
tron., vol. 52, no. 4, pp. 11451152, Aug. 2005.
1388 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014
[13] B. Sahan, A. N. Vergara, N. Henze, A. Engler, and P. Zacharias, A single-
stage PV module integrated converter based on a low-power current-
source inverter, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26022609,
Jul. 2008.
[14] S. Chen, T. Liang, L. Yang, and J. Chen, A boost converter with capacitor
multiplier and coupled inductor for ACmodule applications, IEEE Trans.
Ind. Electron., vol. 60, no. 4, pp. 15031511, Apr. 2013.
[15] D. Cruz and R. Demonti, Grid connected PV system using two
energy processing stages, in Proc. IEEE Photovolt. Spec. Conf., 2002,
pp. 16491652.
[16] A. Trubitsyn, B. J. Pierquet, A. K. Hayman, G. E. Gamache,
C. R. Sullivan, and D. J. Perreault, High-efciency inverter for photo-
voltaic applications, in Proc. IEEE Energy Convers. Congr. Expo., 2010,
pp. 28032810.
[17] B. J. Pierquet and D. J. Perreault, A single-phase photovoltaic inverter
topology with a series-connected power buffer, in Proc. IEEE Energy
Convers. Congr. Expo., 2010, pp. 28112818.
[18] L. Jih-Sheng, Power conditioning circuit topologies, IEEE Ind.
Electron. Mag., vol. 3, no. 2, pp. 2434, Jun. 2009.
[19] F. F. Edwin, W. Xiao, and V. Khadkikar, Topology review of single
phase grid-connected module integrated converters for PV applications,
in Proc. IEEE IECON, 2012, pp. 821827.
[20] Y.-H. Ji, D.-Y. Jung, J.-H. Kim, T.-W. Lee, and C.-Y. Won, A cur-
rent shaping method for PV-AC module DCM-yback inverter under
CCM operation, in Proc. 8th Int. Conf. Power Electron.-ECCE Asia,
May 30/Jun. 3, 2011, pp. 25982605.
[21] A. C. Kyritsis, C. Tatakis, and N. P. Papanikolaou, Optimum design of
the current-source yback inverter for decentralized grid-connected pho-
tovoltaic systems, IEEE Trans. Energy Convers., vol. 23, no. 1, pp. 281
293, Mar. 2008.
[22] Y. Li and R. Oruganti, A low cost yback CCM inverter for AC module
application, IEEE Trans. Power Electron., vol. 27, no. 3, pp. 12951303,
Mar. 2012.
[23] D.-K. Ryu, Y.-H. Kim, J.-G. Kim, C.-Y. Won, and Y.-C. Jung, Interleaved
active clamp yback inverter using a synchronous rectier for a photo-
voltaic AC module system, in Proc. 8th Int. Conf. Power Electron.-ECCE
Asia, May 30/Jun. 3, 2011, pp. 26312636.
[24] T. Shimizu, K. Wada, and N. Nakamura, A yback-type single phase
utility interactive inverter with low-frequency ripple current reduction on
the DC input for an AC photovoltaic module system, in Proc. IEEE 33rd
Annu. PESC, 2002, vol. 3, pp. 14831488.
[25] Y.-C. Hsieh, M.-R. Chen, and H.-L. Cheng, Zero-voltage-switched inter-
leaved yback converter, in Proc. 31st INTELEC, 2009, pp. 16.
[26] A. C. Nanakos, E. C. Tatakis, and N. P. Papanikolaou, A weighted-
efciency-oriented design methodology of yback inverter for AC photo-
voltaic modules, IEEE Trans. Power Electron., vol. 27, no. 7, pp. 3221
3233, Jul. 2012.
[27] Y. H. Kim, Y. H. Ji, J. G. Kim, Y. C. Jung, and C. Y. Won, A new control
strategy for improving weighted efciency in photovoltaic AC module-
type interleaved yback inverters, IEEE Trans. Power Electron., vol. 28,
no. 6, pp. 26882699, Jun. 2013.
[28] J. B. Wang, J. H. Wu, and D. Kao, Injection current phase lag effect of
the yback inverter, in Proc. 6th IEEE Conf. Ind. Electron. Appl., 2011,
pp. 18031808.
[29] S. Zengin, F. Deveci, and M. Boztepe, Decoupling capacitor selection in
DCM yback PV microinverters considering harmonic distortion, IEEE
Trans. Power Electron., vol. 28, no. 2, pp. 816825, Feb. 2013.
[30] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics,
2nd ed. Boston, MA, USA: Kluwer, 2004.
[31] Y. Mahmoud, W. Xiao, and H. H. Zeineldin, A parameterization ap-
proach for enhancing PV model accuracy, IEEE Trans. Ind. Electron.,
vol. 60, no. 12, pp. 57085716, Dec. 2013.
[32] Y. Mahmoud, W. Xiao, and H. H. Zeineldin, A simple approach to
modeling and simulation of photovoltaic modules, IEEE Trans. Sustain.
Energy, vol. 3, no. 1, pp. 185186, Jan. 2012.
[33] W. Xiao, W. G. Dunford, P. R. Palmer, and A. Capel, Regulation of pho-
tovoltaic voltage, IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1365
1374, Jun. 2007.
Fonkwe Fongang Edwin (S12) received the
Diplme dIngnieur de Conception from the
Ecole Nationale Suprieure Polytechnique, Yaound,
Cameroon. He is currently working toward the
M.Sc. degree in electrical power engineering
at Masdar Institute of Science and Technology,
Abu Dhabi, UAE.
His research interests include modeling and con-
trol, power electronics and its applications to re-
newable energy sources, sustainable energy, and
sustainability.
Weidong Xiao (M07) received the M.Sc. and Ph.D.
degrees from The University of British Columbia,
Vancouver, BC, Canada, in 2003 and 2007,
respectively.
In 2010, he was a Visiting Scholar working
with the Massachusetts Institute of Technology,
Cambridge, MA, USA. Prior to his academic ca-
reer, he was with MSR Innovations Inc., Vancouver,
where he worked as an R&D Engineering Manager
focusing on projects related to integration, research,
optimization, and design of photovoltaic power sys-
tems. He is currently a Faculty Member with the Electric Power Engineering
Program, Masdar Institute of Science and Technology, Abu Dhabi, UAE. His
research interests include photovoltaic power systems, dynamic systems and
control, power electronics, and industry applications.
Vinod Khadkikar (S06M09) received the B.E.
degree in electrical engineering from the Gov-
ernment College of Engineering, Dr. Babasaheb
Ambedkar Marathwada University, Aurangabad,
India, in 2000, the M.Tech. degree in electrical en-
gineering from the Indian Institute of Technology,
New Delhi, India, in 2002, and the Ph.D. degree in
electrical engineering from the cole de Technologie
Suprieure, Montral, QC, Canada, in 2008.
From December 2008 to March 2010, he was a
Postdoctoral Fellow with the University of Western
Ontario, London, ON, Canada. Since April 2010, he has been an Assistant
Professor with Masdar Institute of Science and Technology, Abu Dhabi, UAE.
From April 2010 to December 2010, he was a Visiting Faculty Member at the
Massachusetts Institute of Technology, Cambridge, MA, USA. His research
interests include applications of power electronics in distribution systems
and renewable energy resources, grid interconnection issues, power quality
enhancement, active power lters, and electric vehicles.

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