Vlsi Mtech Jntu Kakinada Syllabus
Vlsi Mtech Jntu Kakinada Syllabus
f 2009-2010
Specialization: VLSID/VLSISD
COURSE STRUCTURE
UNIT – I
DESIGN OF DIGITAL SYSTEMS: ASM charts, Hardware description language and control
sequence method, Reduction of state tables, state assignments.
UNIT – II
SEQUENTIAL CIRCUIT DESIGN: design of Iterative circuits, design of sequential circuits
using ROMs and PLAs, sequential circuit design using CPLD, FPGAs.
UNIT – III
FAULT MODELING: Fault classes and models – Stuck at faults, bridging faults, transition and
intermittent faults. TEST GENERATION: Fault diagnosis of Combinational circuits by
conventional methods – Path
Sensitization technique, Boolean difference method, Kohavi algorithm.
UNIT – IV
TEST PATTERN GENERATION: D – algorithm, PODEM, Random testing, transition count
testing, Signature analysis and testing for bridging faults.
UNIT – V
FAULT DIAGNOSIS IN SEQUENTIAL CIRCUITS: State identification and fault detection
experiment. Machine identification, Design of fault detection experiment.
UNIT – VI
PROGRAMMING LOGIC ARRAYS: Design using PLA’s, PLA minimization and PLA
folding.
UNIT – VII
PLA TESTING: Fault models, Test generation and Testable PLA design.
UNIT – VIII
ASYNCHRONOUS SEQUENTIAL MACHINE: fundamental mode model, flow table, state
reduction, minimal closed covers, races, cycles and hazards.
TEXT BOOKS:
REFRENCE BOOKS:
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UNIT – I
REVIEW OF MICROELECTRONICS AND INTRODUCTION TO MOS TECHNOLOGIES:
(MOS, CMOS, Bi CMOS) Technology trends and projections.
UNIT – II
BASIC ELECTRICAL PROPERTIES OF MOS, CMOS & BICOMS CIRCUITS: Ids-Vds
relationships, Threshold voltage Vt, Gm, Gds and Wo, Pass Transistor, MOS,CMOS & Bi
CMOS Inverters, Zpu/Zpd, MOS Transistor circuit model,Latch-up in CMOS circuits.
UNIT – III
LAYOUT DESIGN AND TOOLS: Transistor structures, Wires and Vias , Scalable Design
rules ,Layout Design tools.
UNIT – IV
LOGIC GATES & LAYOUTS: Static complementary gates, switch logic, Alternative gate
circuits, low power gates, Resistive and Inductive interconnect delays.
UNIT – V
COMBINATIONAL LOGIC NETWORKS: Layouts, Simulation, Network delay, interconnect
design, power optimization, Switch logic networks, Gate and Network testing.
UNIT – VI
SEQUENTIAL SYSTEMS: Memory cells and Arrays, clocking disciplines, Design ,power
optimization, Design validation and testing.
UNIT – VII
FLOOR PLANNING & ARCHITECTURE DESIGN: Floor planning methods, off-chip
connections, High-level synthesis, Architecture for low power, SOCs and Embedded CPUs,
Architecture testing.
UNIT – VIII
INTRODUCTION TO CAD SYSTEMS (ALGORITHMS) AND CHIP DESIGN: Layout
Synthesis and Analysis, Scheduling and printing; Hardware/Software Co-design, chip design
methodologies- A simpleDesign example-
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian et . al( 3 authors) PHI of India
Ltd.,2005
2. Modern VLSI Design, 3rd Edition, Wayne Wolf ,Pearson Education, fifth Indian
Reprint, 2005.
REFERENCES:
1. Principals of CMOS Design – N.H.E Weste, K.Eshraghian, Adison Wesley, 2nd
Edition.
2. Introduction to VLSI Design – Fabricius, MGH International Edition, 1990.
3. CMOS Circuit Design, Layout and Simulation – Baker, Li Boyce, PHI, 2004. 3
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UNIT-I
OPERATIONAL AMPLIFIERS: General considerations one – state op-amps, two stage op-amps-gains
boosting stage- comparison I/P range limitations slew rate. CURRENT MIRRORS AND SINGLE
STAGE AMPLIFIERS: simple COMS, 3JT current mirror,, Cascode Wilson Wilder current mirrors.
Common Source amplifier source follower, common gate amplifier
NOISE: Types of Noise – Thermal Noise-flicker noise- Noise in opamps- Noise in common source stage
noise band width.
UNIT-II
PHASED LOCKED LOOP DESIGN: PLL concepts- The phase locked loop in the locked condition
Integrated circuit PLLs – phase Detector- Voltage controlled oscillator c ase study: Analysis of the 560
B Monolithic PLL.
UNIT-III
LOGIC FAMILIES & CHARACTURISTICS : COMS, TTL, ECL, logic families COMS / TTL,
interfacing comparison of logic families.
COMBINATIONAL LOGIC DESIGN USING VHDL: VHDL modeling for decoders, encoders,
multiplexers, comparison, adders and subtractors .
SEQUENCIAL IC DESIGN USING VHD: VHDL modeling for larches, flip flaps, counters,
shift registers, FSMs.
UNIT-IV
DIGITAL INTEGRADED SYSTEM BUILDING BLOCKS: Multiplexers and decoders – barrel
shifters counters digital single bit adder
MEMORIES: ROM: Internal structure 2D decoding commercial type timing and applications
CPLD: XC 9500 series family CPLD architecture – CLB internal architecture, I/O block internal
structure .
FPGA: Conceptual of view of FPGA – classification based on CLB internal architecture I/O
block architecture.
UNIT-V
COMPORATORS: Using an op-amp for a comparator-charge injection errors- latched
comparator
NYQUIST RATE D/A CONVERTERS: Decoder based converter resistor storing converters
folded resister string converter – Binary scale converters – Binary weighted resistor converters –
Reduced resistance ratio ladders – R-2R based converters – Thermometer code current mode
D/A converters.
NYQUIST RATE A/D CONVERTERS: Integrating converters – successive approximation
converters. DAC based successive approximation – flash converters time interleaved A/D
converters.
REFERENCES:
1. Analog Integrated circuit Design by David A Johns, Ken Martin, John Wiley & Sons.
2. Analysis and design of Analog Integrated Circuits, by Gray, Hurst Lewis, Meyer. John
Wiley & Sons.
3. Design of Analog CMOS Integrated Circuits, Behzad Razavi, TMH
4. Digital Integrated Circuit Design by Ken Martin, Oxford University 2000
5. Digital Design Principles & Practices” by John F Wakerly, Pearson Education & Xilinx
Design Series, 3rd Ed.(2002)
SUGGESTING READOMG
w.e.f 2009-2010
TEXT BOOK:
1. Embedded systems: Architecture, programming and design by Rajkamal, TMH.
REFERENCE:
1. Embedded system design by Arnold S Burger, CMP
2. An embedded software primer by David Simon, PEA
3. Embedded systems design:Real world design be Steve Heath; Butterworth Heinenann,
Newton mass
USA 2002
4. Data communication by Hayt.
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UNIT I INTRODUCTION :
An Overview Of Design Procedures Used For System Design Using CAD Tools. Design Entry.
Synthesis, Simulation, Optimization, Place And Route. Design Verification Tools. Examples
Using Commercial PC Based On VHDL Elements Of VHDL Top Down Design With VHDL
Subprograms. Controller Description VHDL Operators.
TEXT BOOKS:
1. Z.NAWABI : VHDL Analysis And Modelling Of Digital Systems. (2/E), Mcgraw Hill,
(1998)
REFERENCE:
1. PERRY : VHDL, (3/E) Mcgraw Hill 10
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UNIT II
Data Communications ; Serial , Parallel configuration , Topology , Transmission modes , codes ,
Error Control Synchronization, LCU.
UNIT III
Serial and Parallel Interfaces , Telephone Networks and Circuits , Data modems.
UNIT IV
Data Communication Protocols , Character and block Mode ,Asynchronous and Synchronous
Protocols, public Data Networks , ISDN.
UNIT V
LOCAL AREA NETWORKS: token ring, Ethernet, Traditional, Fast and GIGA bit Ethernet,
FDDI
UNIT VI
DIGITAL MULTIPLEXING : TDM , T1 carrier , CCITT , CODECS, COMBO CHIPS , North
American Hierarchy , Line Encoding , T-carrier , Frame Synchronization Inter Leaving
Statistical TDM FDM , Hierarchy ,Wave Division Multiplexing .
UNIT VII
WIRELESS LANS
IEEE 802.11 Architecture Layers, Addressing, Blue Tooth Architecture Layers, l2 Cap, Other
Upper Layers .
UNIT VIII
MULTI MEDIA
Digitalizing Video and Audio Compression Streaming Stored and Live Video and Audio , Real
Time Interactive Video and Audio , VOIP
TEXT BOOKS
1. Electronic communication systems, fundamentals through advanced - W. TOMASI, Pearson
4th Edition.
2. Data communication and networking - B.A. Forouzen
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UNIT III
TOOLS FOR CIRCUIT DESIGN AND SIMULATION USING PSPICE:
Pspice Models For Transistors, A/D & D/A Sample And Hold Circuits Etc, And Digital System
Building
Blocks, Design And Analysis Of Analog And Digital Circuits Using PSPICE.
UNIT IV
AN OVER VIEW OF MIXED SIGNAL VLSI DESIGN:
Fundamentals Of Analog And Digitla Simulation,Mixed Signal Simulator Configurations,
Understanding
Modeling, Integration To CAE Environmets, Analyses Of Analog Circuits Eg.A/D, D/A
Converters, Up And
Down Converters, Companders Etc.
UNIT V
TOOLS FOR PCB DESIGN AND LAYOUT:
An Overview Of High Speed PCB Design, Design Entry, Simulation And Layout Tools For
PCB.
Introduction To Orcad PCB Design Tools.
TEXTBOOKS
1. J.Bhaskar, A Verilog Primer, BSP, 2003.
2. J.Bhaskar, A Verilog HDL Synthesis BSP, 2003
3. M.H.RASHID:SPICE FOR Circuits And Electronics Using PSPICE (2/E)(1992) Prentice
Hall.
REFERENCES
1. ORCAD: Technical Reference Manual ,Orcad, USA.
2. SABER: Technical Reference Manual, Analogy Nic, USA.
3. M.J.S.SMITH :Aplication-Specific Integrated Circuits(1997). Addison Wesley
4. J.Bhaskar, A VHDL Synthesis Primer, BSP, 2003.
w.e.f 2009-2010
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY: KAKINADA
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
M. Tech- I Semester
5. Place and Route techniques for major FPGA vendors such as Xilinx, Altera and Actel etc.