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EE210 Midsem 2013

This document contains 7 questions from a mid-semester exam on Microelectronics - I. The questions ask students to analyze various amplifier circuit diagrams and determine key parameters like bias point, voltage gain, input resistance, voltage swing, cutoff frequencies, and sensitivity of cutoff frequency to voltage gain. Calculations are required to analyze the circuits and determine if transistors remain in the forward active mode under given conditions.

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egupta1
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116 views2 pages

EE210 Midsem 2013

This document contains 7 questions from a mid-semester exam on Microelectronics - I. The questions ask students to analyze various amplifier circuit diagrams and determine key parameters like bias point, voltage gain, input resistance, voltage swing, cutoff frequencies, and sensitivity of cutoff frequency to voltage gain. Calculations are required to analyze the circuits and determine if transistors remain in the forward active mode under given conditions.

Uploaded by

egupta1
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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1

18K
V
CC
=12V
R
1
R
2
R
C
5K
Fig. 1
V
S
18K
5.2K
R
E
V
CC
= 5V
1K
V
o
V
S
R
L
=infinity
3K
330K
Fig. 3
V
o
R
B
V
CC

R
C
V
S
Fig. 4
Q
1
R
L
Q
2
DEPARTMENT OF ELECTRICAL ENGINEERING, IIT KANPUR

Microelectronics I (EE210 ) Mid-Sem. Exam

Date: 22.2.13 Max. Marks 30

In all the problems assume that:
11 13
( ) 0.7 ; 100, 4 10 ; 3 10
BE
V ON V C F C F


. Only For estimation of
upper cutoff frequency take 200
bb
r . Ignore output resistance of the transistor.

Q.1 Determine the bias point ( ,
CQ CEQ
I V ) for the amplifier circuit shown in Fig. 1. Assume
that each resistor has a tolerance of 10% (meaning that its value can be 10% higher or
lower than the specified value). Determine whether under worst case condition, the
transistor remains in forward active mode-----4

























Q.2 Figure.2 shows a common-emitter amplifier schematic. Determine voltage gain,
input resistance, voltage swing with HD2 10%, lower and upper cutoff frequencies.---6

Q.3 Figure 3 shows a CB amplifier where the bypass capacitor at the base terminal has
been accidently removed. Determine the voltage gain and upper cutoff frequency of the
amplifier----4

Q.4 Derive an expression for voltage gain for the amplifier shown in Fig. 4. Assume that
both transistors have identical characteristics-----3
V
CC
=5V
v
S
10F
10F
4k
4k
430k
Fig. 2
2
V
o
Q
1
Q
2
V
EE
V
S
V
CC

Fig. 5
R
C
=4k
V
CC

10F
V
o
Q2
10F
10F
V
S
V
CC
= 5V
V
EE
= -5V
R
L
=infinity
Fig. 6
430K
Q1
4K
4.3K
Q1
V
S
Q2
V
o
V
CC
= 5V
Fig. 7
430K
2K
1K
12K
15K
R
2
R
1 R
B1
R
R
C2
R
L
=infinity
Q.5 Transistors Q1 and Q2 are identical and biased at the same collector current of 1mA
in the amplifier shown in Fig. 5. Determine the small signal voltage gain
o s
v v .-----3




















Q.6 Determine voltage gain, maximum output voltage swing with HD2 10% and upper
cutoff frequency of the cascode amplifier shown in Fig. 6------5


Q.7 Determine voltage gain for the amplifier shown in Fig. 7. Will the upper cutoff
frequency in such an amplifier be as sensitive to voltage gain as a conventional CE
amplifier? PNP transistor has V
EB
= 0.7V and 100 ----5

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