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Instruction Set & ALP

The document discusses the instruction set architecture of Intel 8086-80486 processors. It describes the different types of instructions including data transfer, arithmetic, logical, and branch instructions. It provides details on the MOV instruction format and addressing modes used to specify operands. The MOV instruction template is shown using MOD R/M bytes to encode register-register, register-memory and immediate addressing modes.

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0% found this document useful (0 votes)
86 views13 pages

Instruction Set & ALP

The document discusses the instruction set architecture of Intel 8086-80486 processors. It describes the different types of instructions including data transfer, arithmetic, logical, and branch instructions. It provides details on the MOV instruction format and addressing modes used to specify operands. The MOV instruction template is shown using MOD R/M bytes to encode register-register, register-memory and immediate addressing modes.

Uploaded by

Shreyash Sill
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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8086-80486

Instruction set & ALP



Instruction Types
Data Transfer Instructions
Arithmetic Instructions
Logical Instructions
Branch and Program control Instructions

MOV Instruction
MOV destination , source MOV destination , source
Instruction Format
The Processor executes an instruction it
performs the specified function on data
Data- called operands
May be a part of the instruction
May reside in one of the internal registers
of the p
May be stored at an address in memory

Addressing Modes
Register Addressing
Immediate Addressing
Direct Addressing
Register Indirect Addressing
Base-plus-index addressing
Register relative addressing
Base relative plus-indexed addressing
Scaled Indexed Addressing
1 0 0 0 1 0
Opcode D W MOD REG R/M
Low
Disp
High
Disp
Dir
Addr
LB
Dir
Addr
HB
OR
D = 0 ( Direction from Reg )
= 1 ( Direction to Reg )
W = 0 ( Data byte )
= 1 ( Data word )
MOD + R/M - Addressing Modes
BYTE 1 BYTE 2 BYTE 3 BYTE 4
32- bit instruction Format
Address
Size
0-1
Operand
Size
0-1
Opcode

1-2
MOD REG
R/M
0-1
Scaled
Index
0-1
Displace
ment
0-4
Opcode

1-2
MOD REG
R/M
0-1
Displace
ment
0-2
32-bit addressing modes
First two bytes are over-riding prefix
need not be used always
1
st
modifies size of address
16-bit mode 32 bit address 67
H

32-bit mode 16 bit address 67
H


2
nd
modifies size of register
16-bit mode 32 bit register 66
H

32-bit mode 16 bit register 66
H



00 01 10 11

000
001
010
011
100

101
110
111

EAX
ECX
EDX
EBX
Scaled
Index
d32
ESI
EDI

EAX+d8
ECX+d8
EDX+d8
EBX+d8
Scaled Index
+d8
EBP+d8
ESI+d8
EDI+d8

EAX+d32
ECX+d32
EDX+d32
EBX+d32
Scaled Index
+d32
EBP+d32
ESI+d32
EDI+d32
W = 0 W = 1
AL
CL
DL
BL
AH

CH
DH
BH

EAX
ECX
EDX
EBX
ESP

EBP
ESI
EDI
MOV Instruction Template
MOD
R/M


00 01 10 11

000
001
010
011
100
101
110
111


[BX] + [SI]
[BX] + [DI]
[BP] + [SI]
[BP] + [DI]
[SI]
[DI]
d16
[BX]

[BX]+[SI] +d8
[BX]+[DI]+d8
[BP]+[SI]+d8
[BP]+[DI]+d8
[SI]+d8
[DI]+d8
[BP] + d8
[BX]+d8

[BX]+[SI]+d16
[BX]+[DI]+d16
[BP]+[SI]+d16
[BP]+[DI]+d16
[SI]+d16
[DI]+d16
[BP] + d16
[BX]+d16
W = 0 W = 1
AL
CL
DL
BL
AH
CH
DH
BH

AX
CX
DX
BX
SP
BP
SI
DI
MOV Instruction Template
MOD
R/M
EAX/AX/AL 000
EBX/BX/BL 011
ECX/CX/CL 001
EDX/DX/DL 010
ESP/SP/AH 100
EBP/BP/CH 101
ESI/SI/DH 110
EDI/DI/BH 111
REG
MOV AX, BX
Register Addressing
(AX ) (BX)

MOV AH, 4C
H

Immediate Addressing
(AH) 4C
H

1011 W REG
89D8
8BC3
B54C


MOV CX,[437A
H
]

Direct Addressing
(M) CX

M = DS: 437A
H
(CL)
M = DS: 437B
H
(CH)
8B0E 7A43

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