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Lab 2: Hardware/Software Co-Design With The WIMP51

The document summarizes a lab report on a hardware/software co-design lab using an FPGA board. The objectives were to create a 7-segment decoder and use assembly language to program an operation. The student used Quartus to design the decoder, wrote ASM code in ModelSim, tested the simulation, assigned pins, and downloaded the program to the FPGA board to observe the 7-segment display results.

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JimmyDoyle
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28 views

Lab 2: Hardware/Software Co-Design With The WIMP51

The document summarizes a lab report on a hardware/software co-design lab using an FPGA board. The objectives were to create a 7-segment decoder and use assembly language to program an operation. The student used Quartus to design the decoder, wrote ASM code in ModelSim, tested the simulation, assigned pins, and downloaded the program to the FPGA board to observe the 7-segment display results.

Uploaded by

JimmyDoyle
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Brandon Kirby CpE 214, Section 3C Lab 1 Report

Lab 2: Hardware/Software Co-design with the WIMP51

Purpose: To get familiar with the hardware/software co-design and coding with assembly language.

Equipment: Quatus II, ModelSim, FPGA board

Objectives: To create a 7-segment decoder and test it on an FPGA board and use it to test an ASM program that performs the operation 3x5.

Procedure: 1) Use Quartus to create a 7-segment decoder. 2) Write code in ASM to perform the operation 3x5, using the instruction set for the WIMP51. 3) Convert instructions to binary form. 4) Edit imp51_rom.vhd to contain your code. 5) Compile the project. 6) Open files in ModelSim and set the clock period to 100ps. 7) Type into the command line force -freeze /lab2/rst 1 0 followed by force -freeze /lab2/rst 0 50ps and finally run 100ns to see the simulation.

THE WAVEFORM GIVEN BY THE SIMULATION.

8) Assign pins using the pin planner in Quartus.

Brandon Kirby CpE 214, Section 3C Lab 1 Report

9) Compile the program again with the pin assignments made. 10) Download the project to the FPGA board using the programmer in Quartus. 11) Observe the 7-segment display while pressing the push button to control the clock.

Results and Analysis: Upon observing the 7-segment display on the FPGA board, the program seemed to be mostly working. Pressing the clock button produced the desired changes on the display.

Conclusions: Ultimately the 7-decoder was created in Quartus, simulated in ModelSim, and then tested on the FPGA board using the pin assignments given.

Questions: 1. There were 1 byte and 2 byte instructions used. 2. 12 3. 36

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