This document summarizes the instruction set of the 8086 microprocessor. It includes over 50 instructions organized into categories such as data transfer, arithmetic, logic, and control transfer. The instructions are shown with their mnemonic, opcode, description, and flags affected.
This document summarizes the instruction set of the 8086 microprocessor. It includes over 50 instructions organized into categories such as data transfer, arithmetic, logic, and control transfer. The instructions are shown with their mnemonic, opcode, description, and flags affected.
This document summarizes the instruction set of the 8086 microprocessor. It includes over 50 instructions organized into categories such as data transfer, arithmetic, logic, and control transfer. The instructions are shown with their mnemonic, opcode, description, and flags affected.
This document summarizes the instruction set of the 8086 microprocessor. It includes over 50 instructions organized into categories such as data transfer, arithmetic, logic, and control transfer. The instructions are shown with their mnemonic, opcode, description, and flags affected.
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8086
Table 2 Instruction Set Summary
Mnemonic and Instruction Code Description DATA TRANSFER MOV e Move (|ODITSZAPC|=|---------|) 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 RegisterMemory tofrom Register 1 0 0 0 1 0 d w mod reg rm Immediate to RegisterMemory 1 1 0 0 0 1 1 w mod 0 0 0 rm data data if w e 1 Immediate to Register 1 0 1 1 w reg data data if w e 1 Memory to Accumulator 1 0 1 0 0 0 0 w addr-low addr-high Accumulator to Memory 1 0 1 0 0 0 1 w addr-low addr-high RegisterMemory to Segment Register 1 0 0 0 1 1 1 0 mod 0 reg rm Segment Register to RegisterMemory 1 0 0 0 1 1 0 0 mod 0 reg rm PUSH e Push (|ODITSZAPC| = |---------|) RegisterMemory 1 1 1 1 1 1 1 1 mod 1 1 0 rm Register 0 1 0 1 0 reg Segment Register 0 0 0 reg 1 1 0 POP e Pop (|ODITSZAPC| = |---------|) RegisterMemory 1 0 0 0 1 1 1 1 mod 0 0 0 rm Register 0 1 0 1 1 reg Segment Register 0 0 0 reg 1 1 1 XCHG e Exchange (|ODITSZAPC| = |---------|) RegisterMemory with Register 1 0 0 0 0 1 1 w mod reg rm Register with Accumulator 1 0 0 1 0 reg IN e Input from (|ODITSZAPC| = |---------|) Fixed Port 1 1 1 0 0 1 0 w port Variable Port 1 1 1 0 1 1 0 w OUT e Output to (|ODITSZAPC| = |---------|) Fixed Port 1 1 1 0 0 1 1 w port Variable Port 1 1 1 0 1 1 1 w XLAT e Translate Byte to AL 1 1 0 1 0 1 1 1 (|ODITSZAPC| = |---------|) LEA e Load EA to Register 1 0 0 0 1 1 0 1 mod reg rm (|ODITSZAPC| = |---------|) LDS e Load Pointer to DS 1 1 0 0 0 1 0 1 mod reg rm (|ODITSZAPC| = |---------|) LES e Load Pointer to ES 1 1 0 0 0 1 0 0 mod reg rm (|ODITSZAPC| = |---------|) LAHF e Load AH with Flags 1 0 0 1 1 1 1 1 (|ODITSZAPC| = |---------|) SAHF e Store AH into Flags 1 0 0 1 1 1 1 0 (|ODITSZAPC| = |----*****|) PUSHF e Push Flags 1 0 0 1 1 1 0 0 (|ODITSZAPC| = |---------|) POPF e Pop Flags 1 0 0 1 1 1 0 1 (|ODITSZAPC| = |*********|) Mnemonic and Instruction Code Description ARITHMETIC 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 ADD e Add (|ODITSZAPC| = |*---*****|) RegMemory with Register to Either 0 0 0 0 0 0 d w mod reg rm Immediate to RegisterMemory 1 0 0 0 0 0 s w mod 0 0 0 rm data data if s w e 01 Immediate to Accumulator 0 0 0 0 0 1 0 w data data if w e 1 ADC e Add with Carry (|ODITSZAPC| = |*---*****|) RegMemory with Register to Either 0 0 0 1 0 0 d w mod reg rm Immediate to RegisterMemory 1 0 0 0 0 0 s w mod 0 1 0 rm data data if s w e 01 Immediate to Accumulator 0 0 0 1 0 1 0 w data data if w e 1 INC e Increment (|ODITSZAPC| = |*---****-|) RegisterMemory 1 1 1 1 1 1 1 w mod 0 0 0 rm Register 0 1 0 0 0 reg AAA e ASCII Adjust for Add 0 0 1 1 0 1 1 1 (|ODITSZAPC| = |?---??*?*|) DAA e Decimal Adjust for Add 0 0 1 0 0 1 1 1 (|ODITSZAPC| = |?---*****|) SUB e Subtract (|ODITSZAPC| = |*---*****|) RegMemory and Register to Either 0 0 1 0 1 0 d w mod reg rm Immediate from RegisterMemory 1 0 0 0 0 0 s w mod 1 0 1 rm data data if s w e 01 Immediate from Accumulator 0 0 1 0 1 1 0 w data data if w e 1 SBB e Subtract with Borrow: (|ODITSZAPC| = |*---*****|) RegMemory and Register to Either 0 0 0 1 1 0 d w mod reg rm Immediate from RegisterMemory 1 0 0 0 0 0 s w mod 0 1 1 rm data data if s w e 01 Immediate from Accumulator 0 0 0 1 1 1 w data data if w e 1 DEC e Decrement (|ODITSZAPC| = |*---****-|) Registermemory 1 1 1 1 1 1 1 w mod 0 0 1 rm Register 0 1 0 0 1 reg NEG e Change sign 1 1 1 1 0 1 1 w mod 0 1 1 rm (|ODITSZAPC| = |*---*****|) CMP e Compare (|ODITSZAPC| = |*---*****|) RegisterMemory and Register 0 0 1 1 1 0 d w mod reg rm Immediate with RegisterMemory 1 0 0 0 0 0 s w mod 1 1 1 rm data data if s w e 01 Immediate with Accumulator 0 0 1 1 1 1 0 w data data if w e 1 AAS e ASCII Adjust for Subtract 0 0 1 1 1 1 1 1 (|ODITSZAPC| = |?---??*?*|) DAS e Decimal Adjust for Subtract 0 0 1 0 1 1 1 1 (|ODITSZAPC| = |?---*****|) MUL e Multiply (Unsigned) 1 1 1 1 0 1 1 w mod 1 0 0 rm (|ODITSZAPC| = |*---????*|) IMUL e Integer Multiply (Signed) 1 1 1 1 0 1 1 w mod 1 0 1 rm (|ODITSZAPC| = |*---????*|) AAM e ASCII Adjust for Multiply 1 1 0 1 0 1 0 0 0 0 0 0 1 0 1 0 (|ODITSZAPC| = |?---**?*?|) DIV e Divide (Unsigned) 1 1 1 1 0 1 1 w mod 1 1 0 rm (|ODITSZAPC| = |?---?????|) IDIV e Integer Divide (Signed) 1 1 1 1 0 1 1 w mod 1 1 1 rm (|ODITSZAPC| = |?---?????|) AAD e ASCII Adjust for Divide 1 1 0 1 0 1 0 1 0 0 0 0 1 0 1 0 (|ODITSZAPC| = |?---**?*?|) CBW e Convert Byte to Word 1 0 0 1 1 0 0 0 (|ODITSZAPC| = |---------|) CWD e Convert Word to Double Word 1 0 0 1 1 0 0 1 (|ODITSZAPC| = |---------|) Mnemonic and Instruction Code Description LOGIC 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 NOT e Invert 1 1 1 1 0 1 1 w mod 0 1 0 rm (|ODITSZAPC| = |---------|) SHLSAL e Shift LogicalArithmetic Left 1 1 0 1 0 0 v w mod 1 0 0 rm (|ODITSZAPC| = |*---**?**|) SHR e Shift Logical Right 1 1 0 1 0 0 v w mod 1 0 1 rm (|ODITSZAPC| = |*---**?**|) SAR e Shift Arithmetic Right 1 1 0 1 0 0 v w mod 1 1 1 rm (|ODITSZAPC| = |*---**?**|) ROL e Rotate Left 1 1 0 1 0 0 v w mod 0 0 0 rm (|ODITSZAPC| = |-------- |) ROR e Rotate Right 1 1 0 1 0 0 v w mod 0 0 1 rm (|ODITSZAPC| = |*-------*|) RCL e Rotate Through Carry Flag Left 1 1 0 1 0 0 v w mod 0 1 0 rm (|ODITSZAPC| = |*-------*|) RCR e Rotate Through Carry Right 1 1 0 1 0 0 v w mod 0 1 1 rm (|ODITSZAPC| = |*-------*|) AND e And (|ODITSZAPC| = |*---**?**|) RegMemory and Register to Either 0 0 1 0 0 0 d w mod reg rm Immediate to RegisterMemory 1 0 0 0 0 0 0 w mod 1 0 0 rm data data if w e 1 Immediate to Accumulator 0 0 1 0 0 1 0 w data data if w e 1 TEST e And Function to Flags No Result (|ODITSZAPC| = |*---**?**|) RegisterMemory and Register 1 0 0 0 0 1 0 w mod reg rm Immediate Data and RegisterMemory 1 1 1 1 0 1 1 w mod 0 0 0 rm data data if w e 1 Immediate Data and Accumulator 1 0 1 0 1 0 0 w data data if w e 1 OR e Or (|ODITSZAPC| = |*---**?**|) RegMemory and Register to Either 0 0 0 0 1 0 d w mod reg rm Immediate to RegisterMemory 1 0 0 0 0 0 0 w mod 0 0 1 rm data data if w e 1 Immediate to Accumulator 0 0 0 0 1 1 0 w data data if w e 1 XOR e Exclusive or (|ODITSZAPC| = |*---**?**|) RegMemory and Register to Either 0 0 1 1 0 0 d w mod reg rm Immediate to RegisterMemory 1 0 0 0 0 0 0 w mod 1 1 0 rm data data if w e 1 Immediate to Accumulator 0 0 1 1 0 1 0 w data data if w e 1 STRING MANIPULATION REP e Repeat 1 1 1 1 0 0 1 z (|ODITSZAPC| = |---------|) MOVS e Move ByteWord 1 0 1 0 0 1 0 w (|ODITSZAPC| = |---------|) CMPS e Compare ByteWord 1 0 1 0 0 1 1 w (|ODITSZAPC| = |*---*****|) SCAS e Scan ByteWord 1 0 1 0 1 1 1 w (|ODITSZAPC| = |*---*****|) LODS e Load ByteWd to ALAX 1 0 1 0 1 1 0 w (|ODITSZAPC| = |---------|) STOS e Stor ByteWd from ALA 1 0 1 0 1 0 1 w (|ODITSZAPC| = |---------|) CONTROL TRANSFER CALL e Call (|ODITSZAPC| = |---------|) Direct within Segment 1 1 1 0 1 0 0 0 disp-low disp-high Indirect within Segment 1 1 1 1 1 1 1 1 mod 0 1 0 rm Direct Intersegment 1 0 0 1 1 0 1 0 offset-low offset-high seg-low seg-high Indirect Intersegment 1 1 1 1 1 1 1 1 mod 0 1 1 rm Mnemonic and Instruction Code Description JMP e Unconditional Jump: (|---------|) 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Direct within Segment 1 1 1 0 1 0 0 1 disp-low disp-high Direct within Segment-Short 1 1 1 0 1 0 1 1 disp Indirect within Segment 1 1 1 1 1 1 1 1 mod 1 0 0 rm Direct Intersegment 1 1 1 0 1 0 1 0 offset-low offset-high seg-low seg-high Indirect Intersegment 1 1 1 1 1 1 1 1 mod 1 0 1 rm RET e Return from CALL (|ODITSZAPC| = |---------|) Within Segment 1 1 0 0 0 0 1 1 Within Seg Adding Immed to SP 1 1 0 0 0 0 1 0 data-low data-high Intersegment 1 1 0 0 1 0 1 1 Intersegment Adding Immediate to SP 1 1 0 0 1 0 1 0 data-low data-high JEJZ e Jump on EqualZero 0 1 1 1 0 1 0 0 disp (|ODITSZAPC| = |---------|) JLJNGE e Jump on LessNot Greater 0 1 1 1 1 1 0 0 disp or Equal JLEJNG e Jump on Less or Equal 0 1 1 1 1 1 1 0 disp Not Greater JBJNAE e Jump on BelowNot Above 0 1 1 1 0 0 1 0 disp or Equal JBEJNA e Jump on Below or Equal 0 1 1 1 0 1 1 0 disp Not Above JPJPE e Jump on ParityParity Even 0 1 1 1 1 0 1 0 disp JO e Jump on Overflow 0 1 1 1 0 0 0 0 disp JS e Jump on Sign 0 1 1 1 1 0 0 0 disp JNEJNZ e Jump on Not EqualNot Zero 0 1 1 1 0 1 0 1 disp JNLJGE e Jump on Not LessGreater 0 1 1 1 1 1 0 1 disp or Equal JNLEJG e Jump on Not Less or Equal 0 1 1 1 1 1 1 1 disp Greater JNBJAE e Jump on Not BelowAbove 0 1 1 1 0 0 1 1 disp or Equal JNBEJA e Jump on Not Below or 0 1 1 1 0 1 1 1 disp EqualAbove JNPJPO e Jump on Not ParPar Odd 0 1 1 1 1 0 1 1 disp JNO e Jump on Not Overflow 0 1 1 1 0 0 0 1 disp JNS e Jump on Not Sign 0 1 1 1 1 0 0 1 disp LOOP e Loop CX Times 1 1 1 0 0 0 1 0 disp (|ODITSZAPC| = |---------|) LOOPZLOOPE e Loop While ZeroEqual 1 1 1 0 0 0 0 1 disp LOOPNZLOOPNE e Loop While Not 1 1 1 0 0 0 0 0 disp ZeroEqual JCXZ e Jump on CX Zero 1 1 1 0 0 0 1 1 disp (|ODITSZAPC| = |---------|) INT e Interrupt: (|ODITSZAPC| = |--00-----|) Type Specified 1 1 0 0 1 1 0 1 type Type 3 1 1 0 0 1 1 0 0 INTO e Interrupt on Overflow 1 1 0 0 1 1 1 0 (|ODITSZAPC| = |--**-----|) IRET e Interrupt Return 1 1 0 0 1 1 1 1 (|ODITSZAPC| = |*********|) Mnemonic and Instruction Code Description 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 PROCESSOR CONTROL CLC e Clear Carry 1 1 1 1 1 0 0 0 (|ODITSZAPC| = |--------0|) CMC e Complement Carry 1 1 1 1 0 1 0 1 (|ODITSZAPC| = |--------*|) STC e Set Carry 1 1 1 1 1 0 0 1 (|ODITSZAPC| = |--------1|) CLD e Clear Direction 1 1 1 1 1 1 0 0 (|ODITSZAPC| = |-0-------|) STD e Set Direction 1 1 1 1 1 1 0 1 (|ODITSZAPC| = |-1-------|) CLI e Clear Interrupt 1 1 1 1 1 0 1 0 (|ODITSZAPC| = |--0------|) STI e Set Interrupt 1 1 1 1 1 0 1 1 (|ODITSZAPC| = |--1------|) HLT e Halt 1 1 1 1 0 1 0 0 (|ODITSZAPC| = |---------|) WAIT e Wait 1 0 0 1 1 0 1 1 (|ODITSZAPC| = |---------|) ESC e Escape (to External Device) 1 1 0 1 1 x x x mod x x x rm (|ODITSZAPC| = |---------|) LOCK e Bus Lock Prefix 1 1 1 1 0 0 0 0 (|ODITSZAPC| = |---------|) NOTES AL e 8-bit accumulator AX e 16-bit accumulator CX e Count register DS e Data segment ES e Extra segment Abovebelow refers to unsigned value Greater e more positive Less e less positive (more negative) signed values if d e 1 then to reg if d e 0 then from reg if w e 1 then word instruction if w e 0 then byte instruc- tion if mod e 11 then rm is treated as a REG field if mod e 00 then DISP e 0 disp-low and disp-high are absent if mod e 01 then DISP e disp-low sign-extended to 16 bits disp-high is absent if mod e 10 then DISP e disp-high disp-low if rm e 000 then EA e (BX) a (SI) a DISP if rm e 001 then EA e (BX) a (DI) a DISP if rm e 010 then EA e (BP) a (SI) a DISP if rm e 011 then EA e (BP) a (DI) a DISP if rm e 100 then EA e (SI) a DISP if rm e 101 then EA e (DI) a DISP if rm e 110 then EA e (BP) a DISP if rm e 111 then EA e (BX) a DISP DISP follows 2nd byte of instruction (before data if re- quired) except if mod e 00 and rm e 110 then EA e disp-high disp-low The codes used for 'Affected Flags' column are: |-*01? | Unaffected/Affected/Reset/Set/Unknown if s w e 01 then 16 bits of immediate data form the oper- and if s w e 11 then an immediate data byte is sign extended to form the 16-bit operand if v e 0 then count e 1 if v e 1 then count in (CL) x e dont care z is used for string primitives for comparison with ZF FLAG SEGMENT OVERRIDE PREFIX 0 0 1 reg 1 1 0 REG is assigned according to the following table 16-Bit (w e 1) 8-Bit (w e 0) Segment 000 AX 000 AL 00 ES 001 CX 001 CL 01 CS 010 DX 010 DL 10 SS 011 BX 011 BL 11 DS 100 SP 100 AH 101 BP 101 CH 110 SI 110 DH 111 DI 111 BH Instructions which reference the flag register file as a 16-bit object use the symbol FLAGS to represent the file FLAGS e XXXX(OF)(DF)(IF)(TF)(SF)(ZF)X(AF)X(PF)X(CF) NOTES: Tabulated and Edited by Dr. Mohammed Hawa, University of Jordan. Version 1.1, June, 2005. Pin Diagram Intentionally Blank 8086 Registers Rotate Instructions CF CF CF 0 CF 0 CF CF CF 0 CF RCL ROL SHL SAL RCR ROR SHR SAR Conditional Jump Instructions Instruction Description Condition Aliases Opposite JC Jump if carry Carry = 1 JB, JNAE JNC JNC Jump if no carry Carry = 0 JNB, JAE JC JZ Jump if zero Zero = 1 JE JNZ JNZ Jump if not zero Zero = 0 JNE JZ JS Jump if sign Sign = 1 - JNS JNS Jump if no sign Sign = 0 - JS JO Jump if overflow Overflow = 1 - JNO JNO Jump if no overflow Overflow = 0 - JO JP Jump if parity Parity = 1 JPE JNP JPE Jump if parity even Parity = 1 JP JPO JNP Jump if no parity Parity = 0 JPO JP JPO Jump if parity odd Parity = 0 JNP JPE Unsigned Comparisons Instruction Description Condition Aliases Opposite JA Jump if above (>) Carry = 0, Zero = 0 JNBE JNA JNBE Jump if not below nor equal (not <=) Carry = 0, Zero = 0 JA JBE JAE Jump if above or equal (>=) Carry = 0 JNC, JNB JNAE JNB Jump if not below (not <) Carry = 0 JNC, JAE JB JB Jump if below (<) Carry = 1 JC, JNAE JNB JNAE Jump if not above nor equal (not >=) Carry = 1 JC, JB JAE JBE Jump if below or equal (<=) Carry = 1 or Zero = 1 JNA JNBE JNA Jump if not above (not >) Carry = 1 or Zero = 1 JBE JA JE Jump if equal (=) Zero = 1 JZ JNE JNE Jump if not equal () Zero = 0 JNZ JE Signed Comparisons Instruction Description Condition AliasesOpposite JG Jump if greater (>) Sign = Overflow or Zero = 0 JNLE JNG JNLE Jump if not less than nor equal (not <=) Sign = Overflow or Zero = 0 JG JLE JGE Jump if greater than or equal (>=) Sign = Overflow JNL JGE JNL Jump if not less than (not <) Sign = Overflow JGE JL JL Jump if less than (<) Sign Overflow JNGE JNL JNGE Jump if not greater nor equal (not >=) Sign Overflow JL JGE JLE Jump if less than or equal (<=) Sign Overflow or Zero = 1 JNG JNLE JNG Jump if not greater than (not >) Sign Overflow or Zero = 1 JLE JG JE Jump if equal (=) Zero = 1 JZ JNE JNE Jump if not equal () Zero = 0 JNZ JE 8086 Flags Register |ODITSZAPC| Overflow Flag, Direction Flag, Interrupt Flag, Trap Flag, Sign Flag, Zero Flag, Auxilary carry Flag, Parity Flag, Carry Flag ASCII Character Set Intentionally Blank Assembler Directives ALIGN ASSUME sr:sy(,...) ASSUME NOTHING DB e(,...) DBS e DD e(,...) DDS e DW e(,...) DWS e EXT (sr:)sy(t) LABEL t PROC t Align to word boundary Assume segment register name(s) Remove all former assumptions Define Byte(s) Define Byte Storage Define Double Word(s) Define Double Word Storage Define Word(s) Define Word Storage External(s)(t=ABS/BYTE/DWORD/FAR/NEAR/WORD) Label (t=BYTE/DWORD/FAR/NEAR/WORD) Procedure (t=FAR/NEAR, default NEAR) ABS BYTE DWORD FAR HIGH LENGTH LOW NEAR OFFSET PTR SEG SHORT SIZE THIS TYPE WORD Absolute value of operand Byte type operation Double Word operation IP and CS registers altered High-order 8 bits of 16-bit value Number of basic units Low-order 8 bit of 16-bit value Only IP register need be altered Offset portion of an address Create a variable or label Segment of address One byte for a JMP operation Number of bytes defined by statement Create a variable/label of specified type Number of bytes in the unit defined Word operation