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Common Source Jfet Amplifier - Instruction Manual

The document provides instructions for designing and characterizing a common source JFET amplifier. The circuit uses a JFET in a common source configuration, which has high input impedance. A self bias circuit is used to maintain constant drain current and voltage gain over variations in temperature and supply voltage. Learners are instructed to set up the circuit, apply a sinusoidal input signal from 10Hz to 1MHz, and record the input and output amplitudes to plot the frequency response curve and determine the amplifier's bandwidth.

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74 views3 pages

Common Source Jfet Amplifier - Instruction Manual

The document provides instructions for designing and characterizing a common source JFET amplifier. The circuit uses a JFET in a common source configuration, which has high input impedance. A self bias circuit is used to maintain constant drain current and voltage gain over variations in temperature and supply voltage. Learners are instructed to set up the circuit, apply a sinusoidal input signal from 10Hz to 1MHz, and record the input and output amplitudes to plot the frequency response curve and determine the amplifier's bandwidth.

Uploaded by

dinesh189
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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COMMON SOURCE JFET AMPLIFIER --------------------------------------------------------------INSTRUCTION MANUAL

COMMON SOURCE JFET AMPLIFIER Aim To design, set up and plot the frequency responses of a common source JFET amplifier Theory Junction field effect transistor (JFET) is a voltage controlled device. The drain current is controlled by the voltage at gate. Like transistors, JFET amplifiers can also be set up in three configurations namely, common drain, common source and common gate. Common source configuration is similar to common- emitter configuration of BJTs. JFET can be biased as voltage divider bias or self bias. A self bias circuit is shown in the circuit diagram. Self bias maintain drain current and gm relatively constant. constant gm results in a constant voltage gain. The design of the circuit is done in such a way that the gate to source junction is reverse biased. The reverse biased junction provides high input impedance. The applied input voltage slightly changes the gate potential and in turn, the drain current varies. The output voltage varies with the drain current.

Procedure

Set up the circuit on kit . Check the dc conditions and apply the input sinusoidal signal from signal generator to the gate of 100mV. Connect the input and output terminal of trainer to the CRO x, y channels Obtain the amplified output. Take the output amplitude for various frequencies at the input. Vary the frequency of the function generator from 10Hz-1MHz. note down the corresponding input amplitude and output amplitude in the CRO x, y Channels. Records the readings in the tabular column.

Plot the frequency response. Find the bandwidth of the FET amplifier.

Circuit diagram

Observation Frequency in Hz Vin in volts vpp Vo In volts vpp Gain in dB

Frequency response curve

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