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Cycle I: Lab Session - Batch Experiment Mapping

This document contains the laboratory plan for the Department of Electrical and Electronics Engineering at PSG College of Technology for the 2013-2014 academic year. It outlines the list of 10 experiments for the Electronic Circuits & Digital Electronics Laboratory course in the 4th semester. It provides the experiment schedule mapping each of the 10 experiments to the 5 laboratory sessions (A1-A5 and B1-B5) over two cycles. It also lists the laboratory in-charges for the semester.

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Angamuthu Ananth
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34 views

Cycle I: Lab Session - Batch Experiment Mapping

This document contains the laboratory plan for the Department of Electrical and Electronics Engineering at PSG College of Technology for the 2013-2014 academic year. It outlines the list of 10 experiments for the Electronic Circuits & Digital Electronics Laboratory course in the 4th semester. It provides the experiment schedule mapping each of the 10 experiments to the 5 laboratory sessions (A1-A5 and B1-B5) over two cycles. It also lists the laboratory in-charges for the semester.

Uploaded by

Angamuthu Ananth
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING (SANDWICH) PSG COLLEGE OF TECHNOLOGY, COIMBATORE 641 004

LABORATORY PLAN Academic year: 2013-2014 Course : 12E310- Electronic Circuits & Digital Electronics Laboratory Programme: B.E EEE (SW) Semester : 4

List of Experiments Cycle I


1. 2. 3. 4. 5. 6. 7. 8. 9.
10.

Study of Half-wave and Full-wave rectifiers with and without capacitor filter (RTK, BSA) Design and Implementation of Series Voltage Regulator (SAI) Design and Implementation of RC coupled amplifier (SAI) Study of basic digital ICs and Implementation of Adder and Subtractor circuits (AAM, BNI) Design and Implementation of Code converters (NSR) Design and Implementation of Class B Push-Pull amplifier (SAI) Design and Implementation of RC Phase Shift Oscillators (SAI) Design and Implementation of Counters and Shift registers (AAM, BSA) Study of Multiplexer and Demultiplexer (RTK, BNI) Design and Implementation of Synchronous Sequential Circuit (NSR) Group B : 12E601-12E616, 618-629, 13E901-13E907 Day & Periods: Monday 8,9 & 10 Batch Roll No. B1 12E601-605,13E901,902 (7) B2 12E606-610, 13E903,904 (7) B3 12E611-616,13E905(7) B4 12E618-623,13E906 (7) B5 12E624-629,13E907(7)

Cycle II

Group A

: 12E630-12E654, 656,657, 13E908-13E914 Day & Periods: Thursday 8,9 & 10 Batch Roll No. A1 12E630-634, 13E908,909 (7) A2 12E635-639,13E910,911 (7) A3 12E640-644,13E912,913(7) A4 12E645-650,13E914 (7) A5 12E651-654,656,657 (6 )

Lab session Batch Experiment Mapping


Exp. No. Lab session 1 2 3 4 5 6 7 8 9 10 Cycle I 1 A1,B1 A5,B5 A4,B4 A3,B3 A2,B2 2 A2,B2 A1,B1 A5,B5 A4,B4 A3,B3 3 A3,B3 A2,B2 A1,B1 A5,B5 A4,B4 4 A4,B4 A3,B3 A2,B2 A1,B1 A5,B5 5 A5,B5 A4,B4 A3,B3 A2,B2 A1,B1 A1,B1 A5,B5 A4,B4 A3,B3 A2,B2 A2,B2 A1,B1 A5,B5 A4,B4 A3,B3 A3,B3 A2,B2 A1,B1 A5,B5 A4,B4 A4,B4 A3,B3 A2,B2 A1,B1 A5,B5 A5,B5 A4,B4 A3,B3 A2,B2 A1,B1 6 7 Cycle II 8 9 10

Lab In charges Abirami S (SAI) Sathya B (BSA) Nishanthi B (BNI) Karthik RT (RTK) Angamuthu A (AAM) Sampath Raja N(NSR)
Copy to : Dept. Office, Analog Electronics Lab, Technical Assistance, Class Representatives.

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