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Design of Digit-Serial Fir Filters Algorithms Architectures and A Cad Tool

This document discusses algorithms, architectures, and a CAD tool for designing efficient digit-serial finite impulse response (FIR) filters. It introduces optimization algorithms and digit-serial architectures to minimize gate-level area in digit-serial multiple constant multiplication designs, which is a computationally intensive operation for many digital signal processing systems. Experimental results demonstrate the effectiveness of the proposed techniques for designing digit-serial multiplications and FIR filters with reduced complexity.

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ankaiah_yadav
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25 views1 page

Design of Digit-Serial Fir Filters Algorithms Architectures and A Cad Tool

This document discusses algorithms, architectures, and a CAD tool for designing efficient digit-serial finite impulse response (FIR) filters. It introduces optimization algorithms and digit-serial architectures to minimize gate-level area in digit-serial multiple constant multiplication designs, which is a computationally intensive operation for many digital signal processing systems. Experimental results demonstrate the effectiveness of the proposed techniques for designing digit-serial multiplications and FIR filters with reduced complexity.

Uploaded by

ankaiah_yadav
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Design of digit-serial fir filters algorithms architectures and a cad tool

Abstract

Many efficient algorithms and architectures have been introduced for the design of lowcomplexity bit-parallel multiple constant multiplications (MCM) operation which dominates the complexity of many digital signal processing systems. On the other hand, little attention has been given to the digit-serial MCM design that offers alternative low-complexity MCM operations albeit at the cost of an increased delay. In this paper, we address the problem of optimizing the gate-level area in digit-serial MCM designs and introduce high-level synthesis algorithms, design architectures, and a computer-aided design tool. Experimental results show the efficiency of the proposed optimization algorithms and of the digit-serial MCM architectures in the design of digit-serial MCM operations and finite impulse response filters.

NAME: Y.ANKAIAH ROLL NUMBER: 12R01D5701

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