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4.non Linear Pipeline

The document discusses nonlinear pipelines that allow feedback and feedforward connections in addition to streamline connections. It describes reservation tables that show the data flow through linear and nonlinear pipelines. An example of a multifunction pipeline with feedback, feedforward, and streamline connections is presented. Collision analysis and latency analysis are performed using reservation tables to identify permissible and forbidden latencies. State diagrams are constructed using collision vectors to specify permissible state transitions. Optimization techniques like insertion of delay stages are discussed to improve latency. Bounds on minimum average latency are presented.

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11K views20 pages

4.non Linear Pipeline

The document discusses nonlinear pipelines that allow feedback and feedforward connections in addition to streamline connections. It describes reservation tables that show the data flow through linear and nonlinear pipelines. An example of a multifunction pipeline with feedback, feedforward, and streamline connections is presented. Collision analysis and latency analysis are performed using reservation tables to identify permissible and forbidden latencies. State diagrams are constructed using collision vectors to specify permissible state transitions. Optimization techniques like insertion of delay stages are discussed to improve latency. Bounds on minimum average latency are presented.

Uploaded by

dev chauhan
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Non Linear Pipeline

Nonlinear Pipeline

 Dynamic
 Multifunction
 Allows feed back and feed forward connections,
in addition to the streamline connections.
 More than one output; the output of the pipeline
is not necessarily from the last stage.
Reservation Table

 Shows the path of the dataflow through


the pipeline
 Linear pipeline will follow a streamline flow
 Non linear pipeline will follow a non linear
pattern
Reservation table for a Linear pipeline

1 2 3 4

S1 X
S2 X
X
S3

S4
X
Considering a Multifunction Pipeline

OUTPUT X

S1 S2 S3 OUTPUT Y

2 Streamline Connections
3 Stage Pipeline 2 Feedback Connections
1 Feedforward Connection
Reservation Table for function X
1 2 3 4 5 6 7 8

S1 X X X

S2
X X

X X X
S3

• Columns represent the evaluation time for a given function


• Multiple checkmarks in a row, means repeated usage of the same stage
in different cycles
Reservation Table for function Y

1 2 3 4 5 6

S1 Y Y

S2 Y

S3 Y Y Y
Latency Analysis

 Latency: The number of time units (clock cycles)


between two initiations of a pipeline is the latency
between them.
 A latency value k means that two initiations are
separated by k clock cycles.
 Any attempt by two or more initiations to use the same
pipeline stage at the same time will cause a collision.
 A collision implies resource conflicts between two
initiations in a pipeline.
Collision with scheduling latency 2

1 2 3 4 5 6 7 8 9 10

S1 x1 x2 x3 x1 x4 x1 x2 x2 x3

x1 x1 x2 x2 x3 x3 x4 x4
S2

x1 x1 x2 x1 x2 x2 x3
S3 x3 x4
 Latencies that cause collision are called
forbidden latencies.
 Forbidden latencies for function X are 2,4,5,7
 Latencies 1,3,6 do not cause collision.
 Maximum forbidden latency can be m
 n = no. of columns
 m ≤ n-1
 All the latencies greater than m+ do not cause
collisions.
 Permissible Latency p, lies in the range:
1 ≤ p ≤ m-1
 Value of p should be as small as possible
 Permissible latency p=1 corresponds to an ideal case,
can be achieved by a static pipeline
Collision Vectors

 Combined set of permissible and forbidden


latencies.
 m-bit binary vector
C = (Cm Cm-1….C2 C1 )
 The value of Ci = 1 if the latency i causes a
collision; Ci = 0 if the latency i is permissible.
 Cm = 1, always; it corresponds to the maximum
forbidden latency.
State Diagrams

 State diagrams can be constructed to specify the


permissible transitions among successive
initiations.
 The collision vector, corresponding to the initial
state of pipeline at time 1, is called the initial
collision vector.
 The next state of the pipeline at time t+p can be obtained
by using a bit-right shift register
 Initial CV is loaded into the register.
 The register is then shifted to the right
 When a 0 emerges from the right end after p shifts, p is a
permissible latency
 When a 1 emerges, the corresponding latency should be
forbidden
 Logical 0 enters from the left end of the shift register.
 The next state after p shifts is obtained by bitwise-ORing
the initial CV with the shifted register contents.
 This bitwise-ORing of the shifted contents is meant to
prevent collisions from the future initiations starting at
time t+1 and onward.
 Latency Cycles

 Simple Cycles : Latency cycle in which each


state appears only once.

 Greedy Cycles : whose edges are all made with


minimum latencies from their respective starting
states.

 MAL : minimum average latency


 At least one of the greedy cycles will lead to MAL
Collision-free scheduling

 Finding Greedy cycles from the set of Simple cycles


 The Greedy cycle yielding the MAL is the final choice
Optimization technique

 Insertion of Delay stages


 Modification of reservation table
 New CV
 Improved state diagram

 To yield an optimal latency cycle


Bounds on MAL

 MAL is lower-bounded by the maximum number


of checkmarks in any row of the reservation
table.
 MAL is lower than or equal to the average
latency of any greedy cycle in the state diagram.
 Average latency of any greedy cycle is upper-
bounded by the number of 1’s in the initial CV
plus 1.
 Optimal latency cycle is selected from one of the
lowest greedy cycles.
Output

Input S1 S2 S3

1 2 3 4 5

S1 X X

S2 X X
X X
S3

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