Lab 3 Summer 2013 Demo
Lab 3 Summer 2013 Demo
(70)
All operations implemented using a dataflow or structural model except for the barrel shifter, which must be implemented structurally. Sixteen-bit data from SRAM sign extended to 32 bits for ALU
Arithmetic
1. Addition Implemented as a data flow model with carry look-ahead to meet timing constraints 2. Subtraction 2s complement
Logical
1. 2. 3. 4. 5.
AND OR XOR SLT SLL Implemented as barrel shifter using structural design Selectable shift 0..3 positions
Flags
Z, V, C, N
Working with the ALU, SRAM, and Register File (80) Setup
1. Load test ALU instructions into SRAM. 2. Load test data into SRAM.
Run
Configure signal tap to trigger on command and display following transactions: On command 1. Transfer data block from SRAM to register file. 2. Read and interpret ALU instruction from SRAM. 3. Execute ALU instruction and set proper flags. 4. Store result into register file. Timing and Execution Operations completed in single clock cycle Verified using signal tap - 1 of 2 -
A = 25 B = 16 C=7 D=4 E=9 result = ((A B)*(C+D))/E Implemented using pointers to all variables Fully functional
- 2 of 2 -