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CS221 CS221 Computer Arithmetic: Computer Arithmetic: Multiplier

The document discusses various algorithms for computer arithmetic multiplication and division. It describes sequential shift-add multiplication, Booth multiplication, and array multiplication using ripple carry adders and carry save adders. It also covers unsigned division algorithms and optimizations to the division circuit design including reducing the subtractor size and registers used.

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Vikas Ps
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42 views19 pages

CS221 CS221 Computer Arithmetic: Computer Arithmetic: Multiplier

The document discusses various algorithms for computer arithmetic multiplication and division. It describes sequential shift-add multiplication, Booth multiplication, and array multiplication using ripple carry adders and carry save adders. It also covers unsigned division algorithms and optimizations to the division circuit design including reducing the subtractor size and registers used.

Uploaded by

Vikas Ps
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CS221

CS221
Computer Arithmetic :
ComputerArithmetic:
Multiplier
Dr.A.Sahu
Dept of Comp. Sc. & Engg.
DeptofComp.Sc.&Engg.
IndianInstituteofTechnologyGuwahati
1

Outline
MultiplicationAlgorithms
ShiftandAdd,SequentialAlgorithms
Shift d Add S
ti l Al ith
BoothMultiplier
ArrayMultiplierwithRCA/CSA
/

DivisionAlgorithms

Sequential shift add multiplier 3


Sequentialshiftaddmultiplier3
A
n

n
+

s
n

step1:i=0;s=0|B
p
;
|
do{
step2:
if(s0)sH +=A
step3:
control step3:
s=s/2;i++
}while(i<n)
} while (i < n)

FSMDesign
g
Start
S
Sst

CLK

( )
CLK.(i<8)

Do
Sd

Stop
S
Sst

CLK.(i<8)
4

BoothMultiplier
Recodeeach1inmultiplieras+21
Might reducethenumberof1s

+1 1
+1 1
1
+1 1
+1 1
1
+1 1
+1 1
1
1 0 0 0 0 0 1

BoothMultiplier:RecodingExample
0

11

01

(+11)(+11)
(+11) (+11)
(+11)

00010
(+11)

+1 0 1 +1 0 0 1 0 0 +1 1 0
+101+100100+110

If
Ifyouusethelastrowinmultiplication,you
you use the last row in multiplication you
shouldgetexactlythesameresultasusingthe
(
,
y p
firstrow(afterall,theyrepresentthesame
number!)
6

BoothRecoding:MultiplicationExample
g
p
p
Signextension

0
0 0
0 0 1
0 0 1

1
0
0
1
0

0
0
+1
0
1
0
0
0
1

0
1
0
0
0
0
0

1
1
0
0
1
0

1 0
1 0
1 0
0 0
00
0

0 1 0 0

6x
14

(6)

84
7

BoothRecoding:Advantagesand
Disadvantages
d
Dependsonthearchitecture
Depends on the architecture
Potentialadvantage:mightreducethe#of1s
in multiplier
inmultiplier

Inthemultipliersthatwehaveseensofar:
Doesntsaveinspeed
Doesnt save in speed
(stillhavetowaitforthecriticalpath,e.g.,the
shiftadd
shift
adddelayinsequentialmultiplier)
delay in sequential multiplier)
Increasesarea:recodingcircuitryANDsubtraction

SimpleSpeedingup
n 1

A B = A Bi 2

i=0

= A.B0 2 + A.B1 2 + .. + A.Bn 1 2


0

n 1

NAdditioncanbedoneinparallelinLog(N)
steps using N Adder
stepsusingNAdder
A.B0.20

A.B1.21

A.B2.22

A.B3.23

+
9

Array multiplier with carry save


Arraymultiplierwithcarrysave
p23

pij=ai.bj

p33

s7

p22p13

p21p12

p32

p31

p03

p20 p11

+
p30

+ +

+ +

s4

s3

s2

s5

p02

p10

p01 p00

+
s6

s1

s0

Array Multiplier Speeding up


ArrayMultiplierSpeedingup
Speedinguparraymultiplier
Usingcarrypropagateadders:~3nd
Usingcarrysaveadders:~2nd
g
y
(hered=delayof1bitadder)
FFTbasedmultiplication
FFT based multiplication
NBitbinarynumbersA(X)=An12n1+An22n1+..+A01
PolynomialmultiplicationA(X)*B(X)
P l
i l
lti li ti A(X) * B (X)
A(X)*B(X)=IFFT(Afft(X)+Bfft(X));2nlogn+n+nlogn

Division:example
p
0011
0100|00001101
0000
0001101
B
0000
001101
0100
00101
0101
0001

Q
A

A = QB + R
0xBx23
0xBx22
1xBx21
1xBx20

Unsigned Division
UnsignedDivision
A = QB + R
step1:i=0;R=A;Q=0;D=B
do{
step2:
if(Dx2ni1 R)R=R Dx2ni1 ;Qni1=1
Qni1
elseQ
n i 1 =0
i++
} while (i < n)
}while(i<n)

Introducing shift registers


Introducingshiftregisters
A = QB + R
step1:i =0;R=A;Q=0;D=Bx2n1
do{
step2:
if(D R)R=R D;Q =2xQ+1
Q =2xQ
Q
elseQ
D=D/2;i ++
} while (i <n)
}while(i
< n)

Divider design 1
Dividerdesign

D
2n

2n

control

R
2n

Reducing subtractor size


Reducingsubtractor
A = QB + R
step1:i=0;R=2xA;Q=0;D=B
p
;
;
;
do{
step2:
if(D RH)RH =RH D;Q=2xQ+1
else Q = 2 x Q
elseQ=2xQ
R=2xR;i++
} hil (i )
}while(i<n)

Divider design 2
Dividerdesign
D
n

control

R
n

Reducing registers
Reducingregisters
A = QB + R
step1:i=0;R=2xA;D=B
do{
step2:
if(D RH)RH =RH D ;R =2xR+1
elseR =2xR
i++
}while(i<n)#RH =remainder,RL =quotient

Divider design 3
Dividerdesign
D
n

control

R
n

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