CHAPTER 5 MOS FIELD-EFFECT TRANSISTORS (MOSFETs)

Chapter Outline
5.1 Device Structure and Physical Operation
5.2 Current-Voltage Characteristics
5.3 MOSFET Circuits at DC
5.4 Applying the MOSFET in Amplifier Design
5.5 Small-Signal Operation and Models
5.6 Basic MOSFET Amplifier Configurations
5.7 Biasing in MOS Amplifier Circuits
5 8 Discrete Circuit MOS Amplifiers
NTUEE Electronics L. H. Lu 5-1
5.8 Discrete-Circuit MOS Amplifiers
5.9 The Body Effect and Other Topics
5.1 Device Structure and Physical Operation
Device structure of MOSFET
MOS metal-oxide-semiconductor structure.
MOSFET is a four-terminal device: gate (G), source (S), drain (D) and body (B).
The device size (channel region) is specified by channel width (W) and channel length (L).
Two kinds of MOSFETs: n-channel (NMOS) and p-channel (PMOS) devices
The device structure is basically symmetric in terms of drain and source.
Source and drain terminals are specified by the operation voltage.
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Operation with zero gate voltage
The MOS structure form a parallel-plate plate capacitor with gate oxide layer in the middle.
Two pn junctions (S-B and D-B) are connected as back to back diodes.
The source and drain terminals are isolated by two depletion regions without conducting current.
The operating principles will be introduced by using the n-channel MOSFET as an example.
Creating a channel for current flow
Positive charges accumulate in gate as a positive voltage applies to gate electrode.
The electric field forms a depletion region by pushing holes in p-type substrate away from the surface.
Electrons start to accumulate on the substrate surface as gate voltage exceeds a threshold voltage V
t
.
The induced n region thus forms a channel for current flow from drain to source The induced n region thus forms a channel for current flow from drain to source.
The channel is created by inverting the substrate surface from p-type to n-type inversion layer.
The field controls the amount of charge in the channel and determines the channel conductivity.
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Applying a small drain voltage
A positive v
GS
> V
t
is used to induce the channel and it is called n-channel enhancement-type MOSFET.
Free electrons travel from source to drain through the induced n-channel due to a small v
DS
.
The resulting current i
D
flows from drain to source (opposite to the direction of the flow of negative charge).
The current is proportional to the number of carriers in the induced channel.
The channel is controlled by the effective voltage or overdrive voltage: v
OV
v
GS
V
t
The electron charge in the channel due to the overdrive voltage: |Q| = C
ox
WLv
OV
Gate oxide capacitance C
ox
is defined as capacitance per unit area.
MOSFET can be approximated as a linear resistor in this region with a resistance value inversely
proportional to the excess gate voltage. p p g g
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v
DS
(mV)
i
D
(mA)
100 200
0.1
0.2
0.3
0.4
v
GS
= V
t
+1V
v
GS
= V
t
+2V
v
GS
= V
t
+3V
v
GS
= V
t
+4V
v
GS
s V
t
Operation as increasing drain voltage
As v
DS
increases, the voltage along the channel increases from 0 to v
DS
, and the voltage between the gate
and the points along the channel decreases from v
GS
at the source end to (v
GS
v
DS
) at the drain end.
Since the inversion layer depends on the voltage difference across the MOS structure, increasing v
DS
will
result in a tapered channel.
The resistance increases due to tapered channel and the i
D
-v
DS
curve does not continue as a straight line.
At the point v
DSsat
= v
GS
V
t
, the channel is pinched off at the drain side.
Increasing v
DS
beyond this value has little effect on the channel shape and i
D
saturates at this value.
Triode region: v
DS
< v
DSsat
Saturation region: v
DS
> v
DSsat
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Drain Source
Channel
v
DS
v
DS
= 0
v
DS
= v
GS
V
t
0
v
DS
v
GS
V
t
v
GS
Gate
Derivation of the I-V relationship
Induced charge in the channel due to MOS capacitor:
Equivalent resistance dR along the channel:
I-V derivations:
)] ( [ ) ( x v V v C x Q
t GS ox I
=
)] ( [
)] ( [ ) (
0 0
v L
D t GS ox n
t GS ox n
D
I n
D
D
dx i dv x v V v W C
x v V v W C
dx i
x WQ
dx i
dR i dv
DS
=

= = =
} }

) ( ) ( ) ( x WQ
dx
W x h x qn
dx
dR
I n n

= =
Process transconductance parameter (A/V
2
): k

n
=
n
C
ox
Aspect ratio: W/L
Transconductance parameter (A/V
2
): k
n
=
n
C
ox
(W/L)
Drain current of MOSFETs:
Triode region:
Saturation region:
On-resistance (channel resistance for small v
DS
):
NTUEE Electronics L. H. Lu 5-6
]
2
1
) [(
2
0 0
DS DS t GS ox n D
v v V v
L
W
C i =
2
) (
2
1
t GS n Dsat
V v k i =
]
2
1
) [(
2
DS DS t GS n D
v v V v k i =
) ( / 1
t GS n DS
V v k r =
The p-channel enhancement-type MOSFET
p-channel enhanced-type MOSFETs are fabricated on n-type substrate with p
+
source and p
+
drain.
Normally, source is connected to high voltage and drain is connected to low voltage.
As a negative voltage applies to gate electrode, negative charges accumulate in gate and the resulting field
pushes electrons in n-type substrate away from the surface, leaving behind a carrier-depletion region.
As gate voltage exceeds a negative threshold voltage V
t
, holes start to accumulate on the substrate surface.
The induced p region (inversion layer) thus forms a p-type channel for current flow from source to drain.
Negative gate voltage is required to induce the channel enhancement-type MOSFET.
Complementary MOS (CMOS)
CMOS technology employs both PMOS and NMOS devices.
If substrate is p-type, PMOS transistors are formed in n well (n-type body needed).
If substrate is n-type, NMOS transistors are formed in p well (p-type body needed).
The substrate and the well are connected to voltages which reverse bias the junctions for device isolation.
NTUEE Electronics L. H. Lu 5-7
5.2 Current-Voltage Characteristics
Circuit symbol
n-channel enhancement-mode MOSFET
The current-voltage characteristics
Cut-off region: (v
GS
s V
t
)

T i d i ( V d V )
0 =
D
i
Triode region: (v
GS
> V
t
and v
DS
< v
GS
V
t
)

Saturation: (v
GS
> V
t
and v
DS
> v
GS
V
t
)

large-signal model (saturation)

NTUEE Electronics L. H. Lu 5-8
]
2
1
) [(
2
DS DS t GS ox n D
v v V v
L
W
C i =
2
) (
2
1
t GS ox n D
V v
L
W
C i =
Channel length modulation
Channel length modulation: the channel pinch-off point moves slightly away from drain as v
DS
> v
DSsat
.
The effective channel length (L
eff
) reduces with v
DS
.
Electrons travel to pinch-off point will be swept to drain by electric field.
The length accounted for conductance in the channel is replaced by L
eff
:
) 1 ( ) (
2
1
) (
2
1
) (
2
1
)] ( [
2 ' 2 ' 2 '
0 0
'
L
L
V v
L
W
k V v
L L
W
k V v
L
W
k i
dx i dv x v V v W k
t GS n t GS n t GS
eff
n D
V v
L
D t GS n
t GS
eff
A
+ ~
A
= =
=
} }

) 1 ( ) (
2
1
that assuming
2 '
DS t GS n D DS
v V v
L
W
k i v
L
L
+ =
Finite output resistance
V
A
(Early voltage) = 1/ is proportional to channel length: V
A
= V
A
L
V
A
is process-technology dependent with a typical value from 5 ~ 50 V/m.
Due to the dependence of i
D
on v
DS
, MOSFET shows finite output resistance in saturation region.
NTUEE Electronics L. H. Lu 5-9
2 L L

1
] ) (
2
[ ] [
1 2
'
1
D
A
D
t GS
n
constant v
DS
D
o
I
V
I
V v
L
W k
v
i
r
GS
= ~ =
c
c

The body effect

The BS and BD junction should be reverse biased for the device to function properly.
Normally, the body of a n-channel MOSFET is connected to the most negative voltage.
The depletion region widens in BS and BD junctions and under the channel as V
SB
increases.
Body effect: V
t
increases due to the excess charge in the depletion region under the channel.
The body effect can cause considerable degradation in circuit performance.
Threshold voltage:
) ln( and
2
where
] 2 2 [
0
A
f
Si A
f SB f t t
N kT
C
qN
V V V
= =
+ + =
|
c

| |
Current equations:
Temperature effect
V
t
decreases by ~2mV for every 1C rise i
D
increases with temperature.
k
n
decreases with temperature i
D
decreases with increasing temperature.
For a given bias voltage, the overall observed effect of a temperature increase is a decrease in i
D
.
NTUEE Electronics L. H. Lu 5-10
2
) (
2
1
t GS ox n Dsat
V v
L
W
C i =
]
2
1
) [(
2
DS DS t GS ox n D
v v V v
L
W
C i =
i
f
ox
n q C
Breakdown and input protection
Weak avalanche
pn junction between the drain and substrate suffers avalanche breakdown as V
DS
increases
Large drain current is observed
Typical breakdown voltage 20 ~ 150 V
Punch-through
Occurs at lower voltage (~20 V) for short channel devices
Drain current increases rapidly as the drain depletion region extends through the channel
Does not result in permanent damage to the device
Gate-oxide breakdown Gate oxide breakdown
Gate-oxide breakdown occurs when gate-to-source voltage exceeds 30 V
Permanent damage to the device
Input Protection
Protection circuit is needed for the input terminals of MOS integrated circuits
Using clamping diode for the input protection
NTUEE Electronics L. H. Lu 5-11
The p-channel enhancement-type MOSFET
For a p-channel MOSFET, the source is connected to high voltage and the drain is connected to low voltage.
To induce the p-channel for the MOSFET, a negative v
GS
is required V
t
(threshold voltage) < 0V.
The body is normally connected to the most positive voltage.
The current voltage characteristics The current-voltage characteristics
Cut-off region: (v
GS
> V
tp
)

Triode region: (v
GS
< V
tp
and v
DS
> v
GS
V
tp
)

Saturation: (v
GS
< V
tp
and v
DS
s v
GS
V
tp
)

Transconductance parameter k
p
=
p
C
ox
0.4 k
n
The values of v
GS
, v
DS
, V
t
and for p-channel MOSFET operation are all negative
Drain current i
D
is still defined as a positive current.
NTUEE Electronics L. H. Lu 5-12
]
2
1
) [(
2
DS DS tp GS ox p D
v v V v
L
W
C i =
2
) (
2
1
tp GS ox p D
V v
L
W
C i =
0 =
D
i
5.3 MOSFET Circuits at DC
DC analysis for MOSFET circuits
Assume the operation mode and solve the dc bias utilizing the corresponding current equation.
Verify the assumption with terminal voltages (cutoff, triode and saturation).
If the solution is invalid, change the assumption of operation mode and analyze again.
DC analysis example
NTUEE Electronics L. H. Lu 5-13
V V V V
DS GS
696 . 1 and 3 = =
Assuming MOSFET in saturation
V
DS
< V
GS
V
t
not in saturation!
]
2
1
) [(
2 '
DS DS t GS n D
V V V V
L
W
k I =
mA I V V V V
D DS GS
33 . 0 and 35 . 0 , 35 . 3 = = =
Assuming MOSFET in triode
V
DS
< V
GS
V
t
in triode
SS DD S D D DS
SS S D GS
V V R R I V
V R I V
+ = + +
= +
) (
S t GS n GS S D GS SS
R V V
L
W
k V R I V V
2 '
) (
2
1
+ = + =
) solution valid a not ( 1 or 3 V V V
GS
=
Assuming MOSFET in saturation
(V
DS
= 4V) > (V
GS
V
t
= 1V) saturation
5.4 Applying the MOSFET in Amplifier Design
MOSFET voltage amplifier
MOSFET with a resistive load R
D
can be used as a voltage amplifier
The voltage transfer characteristic (VTC)
The plot of v
I
(v
GS
) versus v
O
(v
DS
)
DC analysis as v
GS
increases from 0 to V
DD
Cutoff mode: (0 V s v
GS
< V
t
)

Saturation mode: (v
GS
> V
t
)

2
) (
1
t GS n D
V v k i =
0 =
D
i
DD DS O
V v v = =

Triode mode: (v
GS
further increases)

NTUEE Electronics L. H. Lu 5-14

) (
2
t GS n D
D t GS n DD DS O
R V v k V v v
2
) (
2
1
= =
]
2
1
) [(
2
DS DS t GS n D
v v V v k i =
D DS DS t GS n DD DS O
R v v V v k V v v ]
2
1
) [(
2
= =
Biasing the MOSFET to obtain linear amplification
The slope in the VTC indicates voltage gain
MOSFET in saturation can be used as voltage amplification
Point Q is known as bias point or dc operating point

The signal to be amplified is superimposed on V

BE
v
GS
(t) = V
GS
+ v
gs
(t)
The time-varying part in v
GS
(t) is the amplified signal
The circuit can be used as a linear amplifier if:
D t GS n DD DS
R V V k V V
2
) (
2
1
=
A proper bias point is chosen for gain
The input signal is small in amplitude
The small-signal voltage gain
The amplifier gain is the slope at Q:
Maximum voltage gain of the amplifier
NTUEE Electronics L. H. Lu 5-15
D OV n D t GS n V v
GS
DS
v
R V k R V V k
dv
dv
A
GS GS
= =
=
) (
| |
2 / 2 /
max v
OV
DD
OV
D D
v
A
V
V
V
R I
A = < =
Determining the VTC by graphical analysis
Provides more insight into the circuit operation
Load line: the straight line represents in effect the load
i
D
= (V
DD
v
DS
)/R
D
The operating point is the intersection point
Locating the bias point Q
The bias point (intersection) is determined by properly choosing the load line
The output voltage is bounded by V
DD
(upper bound) and V
OV
(lower bound)
The load line determines the voltage gain
The bias point determines the maximum upper/lower voltage swing of the amplifier The bias point determines the maximum upper/lower voltage swing of the amplifier
NTUEE Electronics L. H. Lu 5-16
5.5 Small-Signal Operation and Models
The DC bias point
MOSFET in saturation
Drain current:
Drain voltage:
The small-signal circuit parameters are determined by the bias point.
The signal-signal operation
The small-signal drain current:
2 2
2
1
) (
2
1
OV n t GS n D
V k V V k I = =
OV D D DD DS
V R I V V > =
gs n gs t GS n t GS n t gs GS n D
gs GS GS
v
W
k v V V
W
k V V
W
k V v V
W
k i
v V v
+ + = + =
+ =
1
) ( ) (
1
) (
1
2 ' ' 2 ' 2 '
The small-signal voltage gain:
NTUEE Electronics L. H. Lu 5-17
d D gs t GS n t GS n
gs n gs t GS n t GS n t gs GS n D
i I v V V
L
W
k V V
L
W
k
L L L L
+ = + ~ ) ( ) (
2
1
2
) ( ) (
2
) (
2
' 2 '
gs t GS n d
v V V
L
W
k i ) (
'
=
D OV n
gs
d
v
gs D OV n D d d
d D d d D D d D DD D D DD D
R V
L
W
k
v
v
A
v R V
L
W
k R i v
v V R i V R i I V R i V v
' =
' = =
+ = = + = = ) (
The small-signal parameters
Transconductance (g
m
): describes how i
d
change with v
gs
Output resistance (r
o
): describes how i
d
change with v
ds
Drain current varies with v
DS
due to channel length modulation
Finite r
o
to model the linear dependence of i
D
on v
DS
The effect can be neglected if r
o
is sufficiently large
D n t GS n V v
GS
D
gs
d
m
I
L
W
k V V
L
W
k
v
i
v
i
g
GS GS
' '
2 ) ( = =
c
c
=
=

1
] [
1
D
A
D
constant v
DS
D
o
I
V
I v
i
r
GS
= ~
c
c

g
o
y g
Body transconductance (g
mb
): describes how i
d
changes with v
bs
The body effect of the MOSFET is modeled by g
mb
Can be neglected if body and source are connected together
NTUEE Electronics L. H. Lu 5-18
2 '
) (
2
1
t GS n D
V v
L
W
k i =
_
m mb
g g =
SB
t
m
BS
t
t GS n
BS
t
t
D
v
v
BS
D
mb
v
V
g
v
V
V v
L
W
k
v
V
V
i
v
i
g
DS
GS
c
c
=
c
c
=
c
c
c
c
=
c
c

=
=
) (
'
constant
constant
ox Si A F SB F t t
C qN v V V / 2 where ] 2 2 [
0
c | | = + + =
SB F SB
t
V v
V
+
=
c
c

_
2 2
+
v
gs

G D
S
+
v
bs

B
r
o
g
m
v
gs
g
mb
v
bs
The small-signal equivalent circuit models
Hybrid-t model
T-model
Neglect r
o
NTUEE Electronics L. H. Lu 5-19
Neglect r
o
5.6 Basic MOSFET Amplifier Configuration
Three basic configurations
Characterizing amplifiers
The MOSFET circuits can be characterized by a voltage amplifier model (unilateral model)
Common-Source (CS) Common-Gete (CG) Common-Drain (CD)
The MOSFET circuits can be characterized by a voltage amplifier model (unilateral model)
The electrical properties of the amplifier is represented by R
in
, R
o
and A
vo
The analysis is based on the small-signal or linear equivalent circuit where dc components are not included
Voltage gain:
Overall voltage gain:
NTUEE Electronics L. H. Lu 5-20
vo
o L
L
i
o
v
A
R R
R
v
v
A
+
=
vo
so L
L
sig in
in
v
sig in
in
sig
o
v
A
R R
R
R R
R
A
R R
R
v
v
G
+ +
=
+
=
The common-source (CS) amplifier
Characteristic parameters of the CS amplifier
Input resistance:
Output resistance:
Open-circuit voltage gain:
Voltage gain:
Overall voltage gain:
CS amplifier can provide high voltage gain.
Input and output are out of phase due to negative gain.
=
in
R
D o D o
R r R R ~ = ||
D m o D m vo
R g r R g A ~ = ) || (
) || ( ) || || (
L D m o L D m v
R R g r R R g A ~ =
) || ( ) || || (
L D
sig
m o L D m
sig
v
R R
R r
r
g r R R g
R r
r
G
+
~
+
=
t
t
t
t
p p p g g
Output resistance is moderate to high.
Small R
D
reduces R
o
at the cost of voltage gain.
NTUEE Electronics L. H. Lu 5-21
The common-source (CS) with a source resistance
Characteristic parameters (by neglecting r
o
)
Input resistance:
Output resistance:
Open-circuit voltage gain:
Voltage gain:
=
in
R
D o
R R =
s m
D m
vo
R g
R g
A
+
=
1
L D m
R R g
A =
) || (
Overall voltage gain:
Source degeneration resistance R
s
is adopted.
Gain is reduced by the factor (1+g
m
R
s
).
It is considered a negative feedback of the amplifier.
NTUEE Electronics L. H. Lu 5-22
s m
v
R g
A
+
=
1
s m
L D m
v
R g
R R g
G
+
=
1
) || (
The common-gate (CG) amplifier
Characteristic parameters of the CG amplifier (by neglecting r
o
)
Input resistance:
Output resistance:
Open-circuit voltage gain:
Voltage gain:
Overall voltage gain:
CG amplifier can provide high voltage gain.
Input and output are in-phase due to positive gain.
m in
g R / 1 =
D o
R R =
D m vo
R g A =
) || (
L D m v
R R g A =
) || (
1
1
L D m
sig m
v
R R g
R g
G
+
=
p p p p g
Input resistance is very low.
A single CG stage is not suitable for voltage amplification.
Output resistance is moderate to high.
Small R
D
reduces R
o
at the cost of voltage gain.
The amplifier is no longer unilateral if r
o
is included.
NTUEE Electronics L. H. Lu 5-23
The common-collector (CD) amplifier
Characteristic parameters of the CD amplifier (by neglecting r
o
)
Input resistance:
Output resistance:
Voltage gain:
Overall voltage gain:
CD amplifier is also called source follower.
Input resistance is very high.
Output resistance is very low.
The voltage gain is less than but can be close to 1
=
in
R
m o
g R / 1 =
1 ) 1 /( ) / 1 /( ~ + = + =
L m L m m L L v
R g R g g R R A
1 ) 1 /( ) / 1 /( ) ( ~ + = + =
L m L m m L L v
R g R g g R R G
The voltage gain is less than but can be close to 1.
CD amplifier can be used as voltage buffer.
It is noted that, in the analysis, the amplifier is not unilateral.
NTUEE Electronics L. H. Lu 5-24
5.7 Biasing in MOS Amplifier Circuits
DC bias for MOSFET amplifier
The amplifiers are operating at a proper dc bias point.
Linear signal amplification is provided based on small-signal circuit operation.
The DC bias circuit is to ensure the MOSFET in saturation with a proper collector current I
D
.
Biasing by fixing gate-to-source voltage
Fix the dc voltage V
GS
to specify the saturation current of the MOSFET:
The bias current deviates from the desirable value due to variations in the device parameters V
t
and
n
Biasing by fixing gate voltage and connecting a source resistance
The bias condition is specified by: and
2 2
) (
2
1
) (
2
1
t G n t GS n D
V V k V V k I = =
R V V k V V
2
) (
1
+ =
2
) (
1
GS D
V V k I = The bias condition is specified by: and
Drain current has better tolerance to variations in the device parameters
NTUEE Electronics L. H. Lu 5-25
S t GS n GS G
R V V k V V ) (
2
+ =
) (
2
t GS n D
V V k I
Biasing using a drain-to-gate feedback resistor
A single power supply is needed.
R
G
ensures the MOSFET in saturation (V
GS
= V
DS
)
MOSFET operating point:
The value of the feedback resistor R
G
affects the small-signal gain.
Biasing using a constant-current source
The MOSFET can be biased with a constant current source I.
The resistor R
D
is chosen to operate the MOSFET in active mode.
The current source is typically a current mirror
2
) (
2
1
t GS n
D
GS DD
V V k
R
V V
=

The current source is typically a current mirror.

Current mirror circuit:
MOSFETs Q
1
and Q
2
are in saturation.
The reference current I
REF
= I = I
D
When applying to the amplifier circuit, the voltage
V
D2
has to be high enough to ensure Q
2
in saturation.
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2
2
) (
2
1
) (
2
1
t GS n REF
t GS n
GS DD
V V k I
V V k
R
V V
=
=

5.8 Discrete-Circuit MOS Amplifiers

Circuit analysis:
DC analysis:
Remove all ac sources (short for voltage source and open for current source)
All capacitors are considered open-circuit
DC analysis of MOSFET circuits for all nodal voltages and branch currents
Find the dc current I
D
and make sure the MOSFET is in saturation
AC analysis:
Remove all dc sources (short for voltage source and open for current source)
All large capacitors are considered short-circuit
Replace the MOSFET with its small-signal model for ac analysis Replace the MOSFET with its small signal model for ac analysis
The circuit parameters in the small-signal model are obtained based on the value of I
D
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Complete amplifier circuit DC equivalent circuit AC equivalent circuit
The common-source (CS) amplifier
The common-source amplifier with a source resistance
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The common-gate (CG) amplifier
The common-drain (CD) amplifier
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The amplifier frequency response
The gain falls off at low frequency band due to the effects of the coupling and by-pass capacitors
The gain falls off at high frequency band due to the internal capacitive effects in the MOSFETs
Midband:
All coupling and by-pass capacitors (large capacitance) are considered short-circuit
All internal capacitive effects (small capacitance) are considered open-circuit
Midband gain is nearly constant and is evaluated by small-signal analysis
The bandwidth is defined as BW= f
H
f
L
A figure-of-merit for the amplifier is its gain-bandwidth product defined as GB = |A
M
|BW
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