MIPS/SPIM Reference Card

CORE INSTRUCTION SET (INCLUDING PSEUDO INSTRUCTIONS)

MNE- FORMON- MAT NAME IC Add add R Add Immediate addi I Add Imm. Unsigned addiu I Add Unsigned addu R Subtract sub R Subtract Unsigned subu R And and R And Immediate andi I Nor nor R Or or R Or Immediate ori I Xor xor R Xor Immediate xori I Shift Left Logical sll R Shift Right Logical srl R Shift Right Arithmetic sra R Shift Left Logical Var. sllv R Shift Right Logical Var. srlv R Shift Right Arithmetic Var. srav R Set Less Than slt R Set Less Than Imm. slti I Set Less Than Imm. Unsign. sltiu I Set Less Than Unsigned sltu R Branch On Equal beq I Branch On Not Equal bne I Branch Less Than blt P Branch Greater Than bgt P Branch Less Than Or Equal ble P Branch Greater Than Or Equal bge P Jump j J Jump And Link jal J Jump Register Jump And Link Register Move Load Byte Load Byte Unsigned Load Halfword Load Halfword Unsigned Load Upper Imm. Load Word Load Immediate Load Address Store Byte Store Halfword Store Word jr jalr move lb lbu lh lhu lui lw li la sb sh sw R R P I I I I I I P P I I I OPCODE/ FUNCT (Hex) 0/20 8 9 0/21 0/22 0/23 0/24 c 0/27 0/25 d 0/26 e 0/00 0/02 0/03 0/04 0/06 0/07 0/2a a b 0/2b 4 5

OPERATION (in Verilog) R[rd]=R[rs]+R[rt] R[rt]=R[rs]+SignExtImm R[rt]=R[rs]+SignExtImm R[rd]=R[rs]+R[rt] R[rd]=R[rs]-R[rt] R[rd]=R[rs]-R[rt] R[rd]=R[rs]&R[rt] R[rt]=R[rs]&ZeroExtImm R[rd]=(R[rs]|R[rt]) R[rd]=R[rs]|R[rt] R[rt]=R[rs]|ZeroExtImm R[rd]=R[rs]R[rt] R[rt]=R[rs]ZeroExtImm R[rd]=R[rs] shamt R[rd]=R[rs] shamt R[rd]=R[rs] >shamt R[rd]=R[rs] R[rt] R[rd]=R[rs] R[rt] R[rd]=R[rs] >R[rt] R[rd]=(R[rs]<R[rt])?1:0 R[rt]=(R[rs]<SignExtImm)?1:0 R[rt]=(R[rs]<SignExtImm)?1:0 R[rd]=(R[rs]<R[rt])?1:0 if(R[rs]==R[rt]) PC=PC+4+BranchAddr if(R[rs]!=R[rt]) PC=PC+4+BranchAddr if(R[rs]<R[rt]) PC=PC+4+BranchAddr if(R[rs]>R[rt]) PC=PC+4+BranchAddr if(R[rs]<=R[rt]) PC=PC+4+BranchAddr if(R[rs]>=R[rt]) PC=PC+4+BranchAddr PC=JumpAddr R[31]=PC+4; PC=JumpAddr PC=R[rs] R[31]=PC+4; PC=R[rs] R[rd]=R[rs] R[rt]={24b0, M[R[rs]+ZeroExtImm](7:0)} R[rt]={24b0, M[R[rs]+SignExtImm](7:0)} R[rt]={16b0, M[R[rs]+ZeroExtImm](15:0)} R[rt]={16b0, M[R[rs]+SignExtImm](15:0)} R[rt]={imm,16b0} R[rt]=M[R[rs]+SignExtImm] R[rd]=immediate R[rd]=immediate M[R[rs]+SignExtImm] (7:0)=R[rt](7:0) M[R[rs]+SignExtImm] (15:0)=R[rt](15:0) M[R[rs]+SignExtImm]=R[rt]

(1) (1)(2) (2) (2) (1)

(3)

(3)

(2) (2)(6) (6) (4) (4)

(5) (5)

2 2 0/08 0/09

(3) (2) (3) (2) (2)

20 24 25 25 f 23

(2) (2) (2)

28 29 2b

REGISTERS
(1) May cause overow exception NAME NMBR USE STORE? (2) SignExtImm ={16{immediate[15]},immediate } $zero 0 The Constant Value 0 N.A. (3) ZeroExtImm ={16{1b0},immediate } $at 1 Assembler Temporary No (4) BranchAddr = {14{immediate[15]},immediate,2b0 } $v0-$v1 2-3 Values for Function Results and No (4) JumpAddr = {PC[31:28], address, 2b0 } Expression Evaluation (6) Operands considered unsigned numbers (vs. 2 s comp.) $a0-$a3 4-7 Arguments No $t0-$t7 8-15 Temporaries No BASIC INSTRUCTION FORMATS, $s0-$s7 16-23 Saved Temporaries Yes FLOATING POINT INSTRUCTION FORMATS $t8-$t9 24-25 Temporaries No 31 16 15 R opcode 26 25 rs 21 20 rt rd 11 10 shamt 6 5 $k0-$k1 26-27 Reserved for OS Kernel No 31 26 25 21 20 16 15 I opcode rs rt immediate $gp 28 Global Pointer Yes 31 26 25 J opcode immediate $sp 29 Stack Pointer Yes 16 15 65 $fp 30 Frame Pointer Yes FR 31 opcode 26 25 fmt 21 20 ft fs 11 10 fd 31 16 15 $ra 31 Return Address Yes FI opcode 26 25 fmt 21 20 rt immediate $f0-$f31 0-31 Floating Point Registers Yes

funct

0 0 0

funct

0 0

Copyright c 2007 Jan Wtzig, Staatliche Studienakademie Dresden (www.ba-dresden.de/jan) This reference card may be used for educational purposes only.

ARITHMETIC CORE INSTRUCTION SET

MNEMONIC div divu mult multu bc1t bc1f c.x.s c.x.d add.s div.s mul.s sub.s add.d div.d mul.d sub.d mfhi mflo mfc0 lwc1 ldc1 swc1 sdc1 FORMAT R R R R FI FR FR FR FR FR FR FR FR FR FR FR R R R I I I I OPERATION (in Verilog) Lo=R[rs]/R[rt]; Hi=R[rs]%R[rt] Lo=R[rs]/R[rt]; Hi=R[rs]%R[rt] {Hi,Lo}=R[rs]R[rt] {Hi,Lo}=R[rs]R[rt] if(FPCond) PC=PC+4+BranchAddr if(!FPCond) PC=PC+4+BranchAddr FPCond=(F[fs] op F[ft])?1:0 FPCond=({F[fs],F[fs+1]} op {F[ft],F[ft+1]})?1:0 (x is eq, lt or le) (op is ==, < or <=) (y is 32, 3c or 3e) F[fd]=F[fs]+F[ft] F[fd]=F[fs]/F[ft] F[fd]=F[fs]F[ft] F[fd]=F[fs]-F[ft] {F[fd],F[fd+1]}={F[fs],F[fs+1]}+{F[ft],F[ft+1]} {F[fd],F[fd+1]}={F[fs],F[fs+1]}/{F[ft],F[ft+1]} {F[fd],F[fd+1]}={F[fs],F[fs+1]}{F[ft],F[ft+1]} {F[fd],F[fd+1]}={F[fs],F[fs+1]}-{F[ft],F[ft+1]} R[rd]=Hi R[rd]=Lo R[rd]=CR[rs] F[rt]=M[R[rs]+SignExtImm] F[rt]=M[R[rs]+SignExtImm]; F[rt+1]=M[R[rs]+SignExtImm+4] M[R[rs]+SignExtImm]=F[rt] M[R[rs]+SignExtImm]=F[rt]; M[R[rs]+SignExtImm+4]=F[rt+1] OPCODE/ FMT/FT/ FUNCT 0///1a (6) 0///1b 0///18 0///19 11/8/1/ 11/8/0/ 11/10//y 11/11//y 11/10//0 11/10//3 11/10//2 11/10//1 11/11//0 11/11//3 11/11//2 11/11//1 0///10 0///12 16/0//0 31/// 35/// 39/// 3d///

NAME Divide Divide Unsigned Multiply Multiply Unsigned Branch On FP True Branch On FP False FP Compare Single FP Compare Double FP Add Single FP Divide Single FP Multiply Single FP Subtract Single FP Add Double FP Divide Double FP Multiply Double FP Subtract Double Move From Hi Move From Lo Move From Control Load FP Single Load FP Double Store FP Single Store FP Double

(6) (4) (4)

(2) (2) (2) (2)

ASSEMBLER DIRECTIVES
Subsequent items are stored in the data segment Subsequent items are stored in the kernel data segment Subsequent items are stored in the kernel text segment Subsequent items are stored in the text starting at [addr] if specied .ascii str Store string str in memory, but do not null-terminate it .asciiz str Store string str in memory and null-terminate it .byte b1 , . . . , bn Store the n values in successive bytes of memory .double d1 , . . . , dn Store the n oating-point double precision numbers in successive memory locations .float f1 , . . . , f1 Store the n oating-point single precision numbers in successive memory locations .half h1 , . . . , hn Store the n 16-bit quantities in successive memory halfwords .word w1 , . . . , wn Store the n 32-bit quantities in successive memory words .space n Allocate n bytes of space in the current segment .extern symsize Declare that the datum stored at sym is size bytes large and is a global label .globl sym Declare that label sym is global and can be referenced from other les .align n Align the next datum on a 2n byte boundary, until the next .data or .kdata directive .set at Tells SPIM to complain if subsequent instructions use $at .set noat prevents SPIM from complaining if subsequent instructions use $at .data [addr] .kdata [addr] .ktext [addr] .text [addr]

SYSCALLS
SERVICE $v0 ARGS print_int 1 integer $a0 print_float 2 oat $f12 print_double 3 double $f12/$f13 print_string 4 string $a0 read_int 5 read_float 6 read_double 7 read_string 8 buf $a0, buen $a1 sbrk 9 amount $a exit 10 RESULT

EXCEPTION CODES
Number 0 4 5 6 7 8 9 10 11 12 13 15 Name Int AdEL AdES IBE DBE Sys Bp RI CpU Ov Tr FPE Cause of Exception Interrupt (hardware) Address Error Exception (load or instruction fetch) Address Error Exception (store) Bus Error on Instruction Fetch Bus Error on Load or Store Syscall Exception Breakpoint Exception Reserved Instruction Exception Coprocessor Unimplemented Arithmetic Overow Exception Trap Floating Point Exception

integer (in $v0) oat (in $f0) double (in $f0) address (in $v0)

[1] Patterson, David A; Hennessy, John J.: Computer Organization and Design, 3rd Edition. Morgan Kaufmann Publishers. San Francisco, 2005.

Copyright c 2007 Jan Wtzig, Staatliche Studienakademie Dresden (www.ba-dresden.de/jan) This reference card may be used for educational purposes only.