Scribd
Upload
36 views4 pages

2 Altera Power Modelincg ESL

c

Uploaded by

Rahul Bhatia
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
36 views4 pages

2 Altera Power Modelincg ESL

c

Uploaded by

Rahul Bhatia
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 4

Design Intent for ESL

June 6th Arif Rahman

2012 Altera Corporation

Times Have Changed

1990s Glue Logic Heterogeneous Capabilities High Integration/ Bandwidth Hardened Subsystems

2010s Cortex-A9 MPCore

SoC FPGA

Flex 6000 30 process

Stratix I 130nm process

Stratix IV 40nm process

Stratix V 28nm process

SoC FPGA 28nm process

2012 Altera CorporationConfidential 2

Low-Power Techniques in FPGA


Some uniqueness vs ASIC and ASSP


Same FPGA supports different applications

Opportunities for chip and system-level optimization


Programmable power technology Coarse or fine-grain power islands and power gating Low power modes Partial reconfiguration

Visibility into design intent for further optimization


Architecture exploration Trade-off between implementation strategies and targeted

optimization HW-SW partition and co-design

2012 Altera CorporationConfidential 3

Altera Needs

High-level architecture exploration


High-Level System Specification => Product Architecture Power-performance analysis and trade-off HW-SW partition Application-driven analysis of power-management techniques

Enable customers adoption of power-aware high-level system specification


Applicability to homogeneous and heterogeneous FPGAs

2012 Altera CorporationConfidential 4

You might also like