ECE 171 Digital Circuits: Prof. Mark G. Faust Maseeh College of Engineering and Computer Science
ECE 171 Digital Circuits: Prof. Mark G. Faust Maseeh College of Engineering and Computer Science
Lecture3
Topics
IEEE754FloatingPoint Binary i Codes d
BCD ASCII,Unicode GrayCode 7SegmentCode Moutofncodes
Seriallinecodes
FloatingPoint
Needtorepresentrealnumbers Fixedpointtoorestrictiveforprecisionand range Notunlikefamiliarscientific scientificnotation notation +6.022x1023
Sign Mantissa Exponent
3
Normalizedmantissa singledigittoleftofdecimalpoint
IEEE754FloatingPointStandard
Binary +1.101011x212
Sign Exponent
Mantissa
Anormalized(binary)mantissawillalwayshavealeading1 sowecanassumeitandgetanextrabitofprecisioninstead
Fraction
IEEE754FloatingPointStandard
SinglePrecision 32bits bits,Bias=127
1 8 23 Significand 0
Exponent+Bias 31 30 23 22
F=1Sign x(1+Significand)x2(ExponentBias)
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IEEE754FloatingPointStandard
Example
1 8 F=1Sign x(1+Significand)x2(ExponentBias) 23
1 10000001
31 30
01000000000000000000000
=0.2510
= 1.012 x2(129127) = 1.012 x22 = 1012 = 5.0 0
129
IEEE754FloatingPointStandard
Willcommonlyseetheseexpressedashex
1 8 23
1 10000001
31 30 23 22
01000000000000000000000
0
C0A00000
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IEEE754FloatingPointStandard
SomeSpecialCases
Zero( (noassumedleading g1) )
Exponent=0,Significand=0
Denormalizednumbers
Exponent=0,Significand 0
IEEE754FloatingPointStandard
Whydoweneeddenormalizednumbers?
Addresses Add gapcaused dby b implicit i li itleading l di 1 Smallestpositivenumber(a)is1.000000x2126 Nextnumber(b)is1.000001 1 000 001x2126= (2126 +2149)
Gaps!
SExponent Significand 1823
00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 00000000000000000000000000000100
0 a
IEEE754FloatingPointStandard
DenormalizedNumbers
Solution Nonnormalizedform Exponent=0,Significand 0 ImplicitExponentof126 F=1Sign x(Significand)x2(126) Smallest S ll positive i i number b ( (a) )=0.000001 0 000 001x2126=2149 Nextsmallestnumber(b)=0.000010x2126=2148
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BCD(BinaryCodedDecimal)
Usedinearly4bitP Simpledisplays 4Bits/DecimalDigit
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ASCII
AmericanStandardCodeforInformation g (pronounced: (p Askey y) Interchange Forencodingtext Universallyused
EBCDIC(oldIBMmainframestandard)died Unicode U i d f fori international t ti l( (nonRoman) R )languages l
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ReflectiveGrayCode(RGC)
Adjacentcodesdifferbysinglebit
UnitDistanceCode
Oftenusedininterfacing gmechanicalsensors
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ReflectiveGrayCode
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ReflectiveGrayCode (Conversion)
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ReflectiveGrayCode (Conversion)
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7SegmentCode
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1outofncodes
8devices 23 =8 therefore3 bits(wires) suffice ifdevoted8 wires usedinSCSI diskdrives, PCI enumeration 000 001 111
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SerialDataTransmission&Storage
Parallel
Storage:eachbitofwordread/writtensimultaneously Transmission:eachbithasseparatesignalpath
Serial
Reducecosts Simplifydesign Higherspeed(LVDS,skew)
Applications
USB PCIExpress E
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SerialDataTransmission&Storage
Clock
Determinesrateatwhich h hbits b aretransmitted d(bit (b rate) ) bittime=clockperiod(1/bitrate)=bitcell
Sync
Determinesstartofbyte(orpacket)
DataFormat
Determinedbylinecode
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CodesforSerialDataTransmission andStorage
NRZ NonReturntoZero NRZI NonReturntoZeroInvert( (onones) ) Transitionbased Differentialsignaling:USB
RZ ReturntoZero BPRZ BipolarReturntoZero DCbalanced MLT3(100BaseTEthernet) Guaranteesatransitionineverybitcell Facilitatesclockrecovery Requireshigherbandwidth Originalcoaxbased10MbpsEthernet moutofncodes(e.g.8B10B):Gigbabit Ethernet 22
Manchesterencoding
OthertechniquesforDCbalancing(andedgedensity)
WhySerial?
Parallel Serial
+
DeviceA
DeviceB
DeviceA
DeviceB
10bidirectionalwiresat250Mbps
pairunidirectionalwiresat2500Mbps(2.5Gbps)
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Traditional ParallelBus
Device A Device B
SourceSynchronousBus
DeviceA DeviceB
Usedin200MHzto1.6GHzrange Cl ksignal Clock i lis i f forwarded d dwith i h d data Designimpact: Boardlayouttracklengthmismatch stilladdstoskew Eliminatesskewerrortermcausedbyclock domainskew Allowsfastercycletimesthanparallel
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EmbeddedClock
Data Clock
Clocksignalembeddedwith ithdata
Clocksignalisembeddedwithdata Receiveduseddigitalphaselockedloop(DPLL)to recoverclockanddeterminewherebittimesare Edgedensitymustguaranteedbyencodingscheme Examples PCIExpress, Express USB, USB SerialRapidIO, RapidIO Infiniband IntelsnewQuickPath Interconnect 26
EdgeLockTechnique(Tracking Receiver)
Device A
DeviceAsendspulsetraintoDeviceB
Device B
DeviceBlocksontoedges tobeinsyncwithpulsestream
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EnsuringEdgeDensity:mofncodes
Some8bitcodewordshavetoofew1s(or0s)toensureedgedensity sufficienttorecoverclock 8b10encoding(developedbyIBMin1983)
Use10bitcodewords,butonlyuseasubsetoftheavailable210 codewordsthat haveabalancednumberof0sand1s Benefits
Ensureedgedensity AvoidDCbiasatreceiverfromimbalance
Running gdisparity p yforunbalancedcodewords
256datacharacters
All8bitbytes 12controlcharacters(INIT,etc)
DeviceA Parallel Data Parallel Data TXFIFO 8B/10B Serializer Encoder 8B/10B Deserializer Decoder
+ _
8 bit byte
10 bit code
Table lookup DeviceB Deserializer 8B/10B Decoder 8B/10B Encoder RXFIFO Parallel Data Parallel Data
RXFIFO
+ _
Serializer
TXFIFO
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ErrorDetectionandCorrection
Errorsoccurduring datastorage/retrievalandtransmission
Noise, Noise crosstalk, talk EMI, EMI cosmicrays, rays impuritiesinICmaterials Morecommonwithhighspeeds,lowervoltages
Usemoutofn codestodetecterrors
Not N t all llpossible ibl codes d areused d(valid) ( lid) Errors inused(valid)codes(hopefully)produceunused(invalid)codes
Example:Luhn Algorithm
Creditcards,IMEI(InternationalMobileEquipmentIdentity) Startfromright,doubleeveryseconddigit Addalldigits Addafinalcheckdigittoensuresumismultipleof10
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DifferentialSignaling
Differential,pointtopoint
Complementarysignalstransmitted Receiverdetectsvoltagedifference betweenlines Lowamplitudes(200mV 400mVtypical),highspeeds Goodnoiseimmunity
Pairroutedtogether noisecancelsout
LVDS LowVoltageDifferentialSignaling
ANSI/TIA/EIA6441995standard(signalingonly,notprotocolorconnectors) 3.125Gbps,+/ 350mV Gbps atmWs Highspeed&lowpowerconsumption FibreChannel GigabitEthernet FibreChannel, Ethernet,HDMI HDMI,DVI, DVI USB
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