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Opcode of Microcontroller - 8051

This document contains hex codes, bytes, mnemonics, and operands for instructions in an assembly language. It provides a mapping of hex codes to instruction names, operation codes, and addressing modes. This information allows one to understand how instructions are encoded in binary and how they access operands in memory.

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anandhkr
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230 views

Opcode of Microcontroller - 8051

This document contains hex codes, bytes, mnemonics, and operands for instructions in an assembly language. It provides a mapping of hex codes to instruction names, operation codes, and addressing modes. This information allows one to understand how instructions are encoded in binary and how they access operands in memory.

Uploaded by

anandhkr
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Hex Code 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F

Bytes Mnemonic 1 2 3 1 1 2 1 1 1 1 1 1 1 1 1 1 3 2 3 1 1 2 1 1 1 1 1 1 1 1 1 1 3 2 1 1 2 2 1 1 1 1 1 1 1 1 1 1 NOP AJMP LJMP RR INC INC INC INC INC INC INC INC INC INC INC INC JBC ACALL LCALL RRC DEC DEC DEC DEC DEC DEC DEC DEC DEC DEC DEC DEC JB AJMP RET RL ADD ADD ADD ADD ADD ADD ADD ADD ADD ADD ADD ADD

Operands addr11 addr16 A A direct @R0 @R1 R0 R1 R2 R3 R4 R5 R6 R7 bit, offset addr11 addr16 A A direct @R0 @R1 R0 R1 R2 R3 R4 R5 R6 R7 bit, offset addr11 A A, #immed A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7

30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61

3 2 1 1 2 2 1 1 1 1 1 1 1 1 1 1 2 2 2 3 2 2 1 1 1 1 1 1 1 1 1 1 2 2 2 3 2 2 1 1 1 1 1 1 1 1 1 1 2 2

JNB ACALL RETI RLC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC JC AJMP ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL JNC ACALL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL JZ AJMP

bit, offset addr11 A A, #immed A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 offset addr11 direct, A direct, #immed A, #immed A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 offset addr11 direct, A direct, #immed A, #immed A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 offset addr11

62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Hex Code 80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F 90

2 3 2 2 1 1 1 1 1 1 1 1 1 1 2 2 2 1 2 3 2 2 2 2 2 2 2 2 2 2

XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL JNZ ACALL ORL JMP MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV Bytes 2 2 2 1 1 3 2 2 2 2 2 2 2 2 2 2 3

direct, A direct, #immed A, #immed A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 offset addr11 C, bit @A+DPTR A, #immed direct, #immed @R0, #immed @R1, #immed R0, #immed R1, #immed R2, #immed R3, #immed R4, #immed R5, #immed R6, #immed R7, #immed Operands offset addr11 C, bit A, @A+PC AB direct, direct direct, @R0 direct, @R1 direct, R0 direct, R1 direct, R2 direct, R3 direct, R4 direct, R5 direct, R6 direct, R7 DPTR, #immed

Mnemonic SJMP AJMP ANL MOVC DIV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV

91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9E 9F A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF C0 C1 C2

2 2 1 2 2 1 1 1 1 1 1 1 1 1 1 2 2 2 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 1 3 3 3 3 3 3 3 3 3 3 3 3 2 2 2

ACALL MOV MOVC SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB ORL AJMP MOV INC MUL reserved MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV ANL ACALL CPL CPL CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE PUSH AJMP CLR

addr11 bit, C A, @A+DPTR A, #immed A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 C, /bit addr11 C, bit DPTR AB @R0, direct @R1, direct R0, direct R1, direct R2, direct R3, direct R4, direct R5, direct R6, direct R7, direct C, /bit addr11 bit C A, #immed, offset A, direct, offset @R0, #immed, offset @R1, #immed, offset R0, #immed, offset R1, #immed, offset R2, #immed, offset R3, #immed, offset R4, #immed, offset R5, #immed, offset R6, #immed, offset R7, #immed, offset direct addr11 bit

C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF F0 F1 F2 F3 F4

1 1 2 1 1 1 1 1 1 1 1 1 1 2 2 2 1 1 3 1 1 2 2 2 2 2 2 2 2 1 2 1 1 1 2 1 1 1 1 1 1 1 1 1 1 1 2 1 1 1

CLR SWAP XCH XCH XCH XCH XCH XCH XCH XCH XCH XCH XCH POP ACALL SETB SETB DA DJNZ XCHD XCHD DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ MOVX AJMP MOVX MOVX CLR MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOVX ACALL MOVX MOVX CPL

C A A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 direct addr11 bit C A direct, offset A, @R0 A, @R1 R0, offset R1, offset R2, offset R3, offset R4, offset R5, offset R6, offset R7, offset A, @DPTR addr11 A, @R0 A, @R1 A A, direct A, @R0 A, @R1 A, R0 A, R1 A, R2 A, R3 A, R4 A, R5 A, R6 A, R7 @DPTR, A addr11 @R0, A @R1, A A

F5 F6 F7 F8 F9 FA FB FC FD FE FF

2 1 1 1 1 1 1 1 1 1 1

MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV

direct, A @R0, A @R1, A R0, A R1, A R2, A R3, A R4, A R5, A R6, A R7, A

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