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Cad For Vlsi Circuits 2 PDF

This document contains questions for an examination on CAD for VLSI circuits. It includes multiple choice and long answer questions covering topics such as: - NP-completeness and algorithms for spanning trees, partitioning, placement and routing problems - Floorplanning objectives and high-level synthesis - Logic synthesis techniques including binary decision diagrams - Simulation approaches and their applications

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3K views2 pages

Cad For Vlsi Circuits 2 PDF

This document contains questions for an examination on CAD for VLSI circuits. It includes multiple choice and long answer questions covering topics such as: - NP-completeness and algorithms for spanning trees, partitioning, placement and routing problems - Floorplanning objectives and high-level synthesis - Logic synthesis techniques including binary decision diagrams - Simulation approaches and their applications

Uploaded by

rajasekarkpr
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Reg. No.

M.E. DEGREE EXAMINATION, JUNE 2010 Second Semester VLSI Design

VL9221 CAD FOR VLSI CIRCUITS

(Common to M.E. Applied Electronics) (Regulation 2009) Time : Three hours Answer ALL Questions

PART A (10 2 = 20 Marks) 1. 2. 3. 4. 5. 6. 7. 8. 9. When is a problem said to be NP-complete?

Distinguish between behavioral and structural design domains.

Compare standard cell placement and building block placement problems. What are the objectives of floor planning? Distinguish between local and global routing. State the importance of Binary decision diagram. What is the role of logic synthesis in VLSI design? Give the differences between assignment and allocation.

10.

Define high level synthesis.

What is meant by layout compaction?

4
Maximum : 100 Marks

Question Paper Code: J7795

PART B (5 16 = 80 Marks) 11. (a) (i) (ii) Explain the Prims algorithm for spanning trees with necessary pseudocode. (8)

Or (b) (i) (ii) 12.


(a) (i)

Describe simulated annealing with a pseudocode. Explain the compaction. Bellman Ford algorithm for

Explain the concepts of linear programming with suitable expressions. (10)

(ii)

Discuss the applications of Genetic algorithm in VLSI placement. (8) Or

(b)

(i) (ii)

Describe the Kernighan-Lin partitioning algorithm with pseudocode and necessary diagrams. (10) Draw the bipartite and tripartite graph models of RS latch and explain briefly. Explain them. (6)

(i) (ii)

Shape functions and floor plan sizing. Area routing.

0
Or Or Or 2

13.

(a)

Write short notes on :

(b)

(i) (ii)

Discuss the construction of rectilinear Steiner trees. Give a brief account on channel routing Explain event driven simulation and its applications. Explain briefly switch level simulation.

14.

(a)

(i) (ii)

(b)

(i) (ii)

Explain the principle and implementation of ROBDD. Give a brief note on two level logic syntheses.

15.

(a)

Explain any two scheduling algorithms in detail.

(b)

(i)

Write a brief note on high level transformations. Discuss the different sub problems of assignment problem.

(ii)

0
(6) constraint graph (8) (8) (8) (8) (8) (8) (8) (8) (8) (16) (8) (8)

Write down the pseudocode and discuss briefly the principle of Tabu search. (8)

1
J7795

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