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Eee 596 Asic Design Lab

This document appears to be a lab report submitted by a student for an ASIC Design lab course. The report includes sections on the project title, abstract, literature survey, methodology, results and discussion of simulation, synthesis and physical design. It also includes references and an annexure. The document includes a bonafide certificate signed by faculty confirming the work was done by the student for the course during the specified time period.

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112 views5 pages

Eee 596 Asic Design Lab

This document appears to be a lab report submitted by a student for an ASIC Design lab course. The report includes sections on the project title, abstract, literature survey, methodology, results and discussion of simulation, synthesis and physical design. It also includes references and an annexure. The document includes a bonafide certificate signed by faculty confirming the work was done by the student for the course during the specified time period.

Uploaded by

Nambisan04
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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EEE596 ASIC DESIGN LAB

LAB REPORT
By

<Name>
(<Register Number>)

M.Tech. VLSI Design


Winter 2012 -13

SCHOOL OF ELECTRONICS ENGINEERING VIT UNIVERSITY VELLORE 632014, TAMILNADU, INDIA

May 2013

EEE596 ASIC DESIGN LAB

<page no.>

Vellore 632014, Tamilnadu, India.

SCHOOL OF ELECTRONICS ENGINEERING

BONAFIDE CERTIFICATE

This is certified to be the bonafide record of work done by ________________ Reg.No. _____________ of First Year M.Tech VLSI Design for EEE 596 ASIC DESIGN LAB course of VIT University during Jan13 to May 13.

Faculty-In-Charge(s) (Prof.K.Sivasankaran ) (Prof.R.Sakthivel)

SUBMITTED FOR PRACTICAL EXAMINATION HELD ON

Internal Examiner

External Examiner

EEE596 ASIC DESIGN LAB

<page no.>

<Project Title>

EEE596 ASIC DESIGN LAB

<page no.>

Outline

1. 2. 3. 4.

Abstract Literature Survey Methodology Result and Discussion 4.1 Simulation 4.2 Synthesis 4.3 Physical Design 5. Conclusion 6. References 7. Annexure

<page No.> <page No.> <page No.> <page No.>

<page No.> <page No.> <page No.>

EEE596 ASIC DESIGN LAB

<page no.>

EEE596 ASIC DESIGN LAB

<page no.>

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