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Faculty of Media Engineering and Technology: NOT To Be Submitted

This document contains 5 exercises related to computer organization and system programming. The exercises cover topics like specifying control words to implement micro-operations on a processor, determining micro-operations based on control words, describing the push and pop operations on a stack, analyzing components of a bus-organized CPU, and explaining how a first-in first-out (FIFO) memory operates with counters.

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47 views2 pages

Faculty of Media Engineering and Technology: NOT To Be Submitted

This document contains 5 exercises related to computer organization and system programming. The exercises cover topics like specifying control words to implement micro-operations on a processor, determining micro-operations based on control words, describing the push and pop operations on a stack, analyzing components of a bus-organized CPU, and explaining how a first-in first-out (FIFO) memory operates with counters.

Uploaded by

donkalonk
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Dr.

Cherif Salama Faculty of Media Engineering and Technology CSEN 402 Computer Organization and System Programming Practice Assignment 9 Spring 2012
NOT to be submitted

Exercise 1: Specify the control word that must be applied to the processor of Fig.8-2 to implement the following micro-operations. a. R1R2+R3 b. R4R4 c. R5 R5-1 d. R6shl R1 e. R7input

Exercise 2: Determine the micro-operations that will be executed in the processor of Fig. 8-2 when the following 14-bit control words are applied. a. 00101001100101 b. 00000000000000 c. 01001001001100 d. 00000100000010 e. 11110001110000 Exercise 3: A stack is organized such that SP always points at the next empty location on the stack. This means that SP can be initialized to 0x4000 in Fig. 8-4 and the first item in the stack is stored in location 0x4000. List the micro-operations for the PUSH and POP operations. Exercise 4: A bus-organized CPU similar to Fig.8-2 has 16 registers with 32 bits in each, an ALU, and a destination decoder. a. How many multiplexers are there in the A bus, and what is the size of each multiplexer? b. How many selection inputs are needed for MUX A and MUX B? c. How many inputs and outputs are there in the decoder? 1

d. How many inputs and outputs are there in the ALU for data, including input and output carries? e. Formulate a control word for the system assuming that the ALU has 35 operations.

Exercise 5: A first-in, first-out (FIFO) has a memory organization that stores information in such a manner that the item that stored first is the first item that is retrieved. Show how a FIFO memory operates with three counters. A write counter WC holds the address for writing into memory. A read counter RC holds the address for reading from the memory. An available storage counter ASC indicates the number of words stored in FIFO. ASC is incremented for every word stored and decremented for every item is retrieved.

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