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EL-214 Digital Logic Design (3rd Semester) : Lab Experiment No.2

This document provides instructions for a lab experiment to verify the operation of NAND, NOR, and XOR logic gates. The objectives are to learn about these logic gates and their operation by implementing and verifying their truth tables. The required equipment includes a digital trainer board with NAND, NOR, and XOR integrated circuits installed. The discussion section defines the logic functions of each gate. The preliminary procedure instructs applying power and inputs to each gate and connecting the outputs to LEDs to observe the results. Truth tables are also to be developed and verified for 4-input NAND and NOR gates.

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493 views2 pages

EL-214 Digital Logic Design (3rd Semester) : Lab Experiment No.2

This document provides instructions for a lab experiment to verify the operation of NAND, NOR, and XOR logic gates. The objectives are to learn about these logic gates and their operation by implementing and verifying their truth tables. The required equipment includes a digital trainer board with NAND, NOR, and XOR integrated circuits installed. The discussion section defines the logic functions of each gate. The preliminary procedure instructs applying power and inputs to each gate and connecting the outputs to LEDs to observe the results. Truth tables are also to be developed and verified for 4-input NAND and NOR gates.

Uploaded by

Saad Khaliq
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EL-214 Digital Logic Design (3rd Semester) LAB EXPERIMENT NO.

Name: -------------------------------------------

Roll No. --------------------------

Lab Instructor Signature: ---------------------

Date: ------------------------------

To verify the operation of NAND, NOR & XOR gates


PEFORMANCE OBJECTIVES: Upon successful completion of this experiment, the student will be able to know The mentioned logic gates and their operation Implement and verify the truth table of mentioned logic gates EQUIPMENT REQUIRED: Digital trainer (Logic Tutor LT-345 MK2 & CK342A) with adapter Jumper cables NAND gate IC (7420) installed on trainer board NOR gate IC (7425) installed on trainer board XOR gate IC (7425& 7404) installed on trainer board

DISCUSSION: NAND gate: For a 2-input NAND gate, output is LOW if both inputs are HIGH; output is HIGH either one of the inputs is LOW or if both inputs are LOW. Its logic function is represented as F = ( A.B) NOR gate: For a 2-input NOR gate, output is LOW if either of the input is HIGH or if both inputs are HIGH; output is HIGH if both inputs are LOW. Its logic function is represented as F = ( A + B) XOR gate: For an exclusive-OR gate, output is HIGH if one of the inputs is HIGH and other is LOW; output is LOW if both inputs are LOW or both HIGH. Its logic function is represented as F = A B

PRELIMINARY PROCEDURE: Apply Vcc +5V to pins of digital trainer board. Verify its NAND, NOR & XOR operation by applying 0 and 1 on input of concern IC and connect the output of each gate to a LED Fill the following table

The Islamia University of Bahawalpur

EL-214 Digital Logic Design (3rd Semester)


NOTE:

Also develop a truth table for four inputs NAND gate & NOR gate and verify its results. PIN CONFIGURATION:

(a) NAND gate (7400)

(a) NOR gate (7402)

(a) XOR gate (7486)

TEST RSULTS/OBSERVATIONS: _____________________________________________________________________ _____________________________________________________________________

The Islamia University of Bahawalpur

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