Logic Synthesis

Outline
Logic Synthesis Problem Logic Specification Two-Level Logic Optimization

Goal
Understand logic synthesis problem Understand logic optimization problem

From Hank Walker

Logic Synthesis Problem

Map from logic equations to gate-level combinational logic
will consider FSM synthesis later

Goals
maximize speed minimize power minimize chip/board area

Constraints
target technology CAD tool CPU time

abc + abc + d

bc + d

b c

b c d

Logic Specification
Two-level logic equations
sum of products PLA format ESPRESSO format

x = abc + def + ghi + jkl + ... y = bc + e + ghi + jk + ...

.i 3 .o 3 .p 4 10x101 x01100 110110 11x010 .e

Multiple-level logic equations

Berkeley Logic Intermediate Format (BLIF) arbitrary set of equations generated in converting directly from RTL e.g. logic equations for ALU generated from gate-level netlist

x = ab + bc + abc y = abc + ab z = ab
literal operand

x = (a(b+c)d + ef(i+j))(k + l)

Logic Specification
Logic equations are flattened to two levels
AND-OR, NAND-NAND, NOR-NOR common starting point for most tools eliminates any input bias causes exponential explosion in equation size in worst case does not occur in practice

Logic Synthesis Problem

1. logic equation simplification
reduce literal and operand count less stuff to implement generally reduces chip area does not always minimize delay

2. logic synthesis
map equations to generic gates AND, OR, NOT

3. gate-level optimization
local transformations for speed, area, power e.g. AND-NOT => NAND need estimate of technology costs

4. technology mapping
map from gates to component library FPGAs, standard cells, TTL, etc.

Karnaugh Maps - Two-Level Minimization

Build map - 2N entries
label entries 0-F=0 1-F=1 X - F = dont care F = ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD C 0 0 1 A 1 1 D F = AB + AC + BD 0 0 0 1 1 0 1 1 0 0 B 1

Find minimum prime cover

cover - set of terms whose union is true for all entries that are 1 can also cover all 0 entries instead and complement F prime - terms are simplest (largest cover) they can be AB vs. ABC + ABC minimum - fewest terms

F = AB + BC + AD

Examples

C 0 0 1 A 0 1 1 0 1 1 0 0 B 1 A 1 1 1 0 0 0 1 0 1

C 0 0 B 1

1 D

1 D

F = AC + BD + ABCD ABCD is not prime

F = AC + BD F is not a cover

Examples

C 0 0 1 A 0 1 1 0 1 1 0 0 B 1 A 1 1 1 0 0 0 1 0 1

C 0 0 B 1

1 D

1 D

F = AB + AD + BC Solve for complement

F = A + BD Use dont care terms when determining if term is prime

Can Get Into Local Minima

C 1 1 1 A 0 0 D C 1 1 1 A 0 0 D 0 0 1 0 0 1 0 0 1 1 1 1 1 0 0 0 D 1 0 0 0 0 0 1 0 0 1 0 0 1 1 B 1 A 0 0 D C 1 1 0 0 1 0 0 1 1 1 1 0 1 0 C 1 1 B

B
1 A 0 0 1 1

Local Minima
C C

1
1 1 A 0

1
0 0 0 D

1
0 0 0

1
1 B 1 A 0

1
1 1 0

1
0 0 0 D

1
0 0 0

1
1 B 1 0

C 1 1 1 A 0 0 D 0 0 1 0 0 1 0 0 1 1 1 1 1 0 0 0 D 1 0 0 0

C 1 1

B
1 A 0 0 1 1

Local Minima
C C

1
1 1 A 0

1
0 0 0 D

1
0 0 0

1
1 B 1 A 0

1
1 1 0

1
0 0 0 D

1
0 0 0

1
1 B 1 0

F = BD + AD + AB Result is not minimal

F = AB + BD

Result is minimal
Usually many minima

Solution

try different cover sequences

Minimum cover is NP-complete

exponential time in worst case

Problems with Karnaugh Maps

Exponential space in number of inputs

e.g. 100 input function needs 2100 cells very inefficient if number of 1 or 0 cells is small

Needs of two-level minimization

efficient data structure ideally linear in size of function efficient means of searching for minimal prime cover get close to optimal in reasonable time serve as a building-block for multi-level minimization

Logic Optimization Definitions

N-dimensional boolean space - 2N points, each associated with a unique set of N literals e.g. entries in a Karnaugh map or truth table each point is a minterm e.g. abcd, abcd, in space <a:d> cube - conjunction (AND) of literals in N-dim boolean space points on N-dim hypercube that are 1 examples: abc, acd expression - disjunction (OR) of cubes, i.e. equation example: abc + def dont cares - missing literals from cube example: abc in space of <a:d>, d is dont care result is cube covering larger part of space abc = abcd + abcd

cube: a DC: b

ab ab

ab space: <a:b> ab

Two-Level Logic Optimization

Approach
find minimal set of cubes to cover ON-set (1 minterms) each cube = AND gate minimal cubes => minimal AND gates each expression = cubes + OR gate one expression (OR gate) per output exploit dont cares to increase cube sizes each DC doubles cube size cube must only cover 1 or DC vertices or cover OFF-set (0 minterms) instead

redundancy in cube cover

ab
ab

ab
ab

ON
a + b DC OFF

Two-Level Logic Optimization

Minimal set of cubes
minimum graph covering problem NP-complete - exponential in worst case must use heuristic search

Complications
solve simultaneously for each expression (output) minimize total number of unique cubes consider ON vs. OFF vs. DONT CARE set ESPRESSO input .i 3 .o 3 .p 4 10x101 x01100 110110 11x010 .e ESPRESSO output .i 3 .o 3 .p 4 -01 100 11- 010 1-0 100 10- 001 .e

x = ab + bc + abc y = abc + ab z = ab

x = bc + ac y = ab z = ab

Two-Level Logic Optimization

Approach
minimize cover of ON-set of function ON-set is set of vertices for which expression is TRUE minimum set of cubes exploit dont cares to increase cube sizes

Algorithm
start with cubes covering the ON-set this is just sum-of-products form iteratively expand, shrink, add, remove cubes remove redundant (covered) cubes result is irredundant cover x = ab + ab + ab ab ab ab ab ab ab x = a + b ab ab

ESPRESSO Algorithm
Forig = ON-set; /* vertices with expression TRUE */ R = OFF-set; /* vertices with expression FALSE */ D = DC-set; /* vertices with expression DC */ F = expand(Forig, R); /* expand cubes against OFF-set */ F = irredundant(F, D); /* remove redundant cubes */ do { do { F = reduce(F, D); /* shrink cubes against ON-set */ F = expand(F, R); F = irredundant(F, D); } until cost is stable; /* perturb solution */ G = reduce_gasp(F, D); /* add cubes that can be reduced */ G = expand_gasp(G, R); /* expand cubes that cover another */ F = irredundant(F+G, D); } until time is up; ok = verify(F, Forig, D); /* check that result is correct */

Cube Operations
Expand
expand essential cubes in F in decreasing size to a prime cube prime cube - fully expanded against OFF-set essential cube - contains essential vertex essential vertex - minterm no other cube covers remove any covered cubes

01
Expand 00

11
10

01
00

11
10

ON DC OFF

Cube Operations
Irredundant
find minimal cover with each cube containing an essential vertex find relatively essential cubes E removing them violates cover - keep them redundant cubes R = F - E can be individually removed totally redundant Rt - covered by E+D remove Rt partially redundant Rp - R - Rt new F = E + minimal set of Rp

E Irredundant 01 Rp 00 Rp 11 Rt 10 01 11

ON DC

00

10

OFF

Cube Operations
Reduce
shrink cubes in descending order of size while maintaining cover smaller cubes can expand in more directions smaller cubes more likely to be covered by other cubes during expansion

01 Reduce 00

11 10

01 00

11 10

ON DC OFF

Cube Operations
Reduce Gasp
for each cube add a subcube not covered by other cubes

Expand Gasp
expand subcubes and add them if they cover another cube later use Irredundant to discard redundant cubes this is a last gasp heuristic for exploration no ordering by cube size

01

11 10

01 00

11 10 ON DC OFF

Reduce Gasp
00

01

11 10

01 00

11 10

Expand Gasp
00

Example
x = ab + ab + ab ab ab ab ab Expand ab ab ab ab Irredundant ab ab ab ab Expand ab ab Irredundant Reduce ab ab x = a + b ab ab

ab
ab Cost Stable

ab
ab

ab

ab

Examples
Rp E

Rp E Essential and Redundant Cubes Prime & Irredundant Cover

Initial Cover

Reduce

Expand in right direction

Conclusions

Experimental Results
ESPRESSO algorithm gets minimum or close to minimum cover where cover is known up to 10 000 input literals, 100 inputs, 100 outputs tested CPU time < 12 min on high-speed workstation

Application
PLA minimization use as subroutine in multi-level logic minimization minimize pieces of larger circuit