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CMOS VLSI Design

This syllabus covers CMOS VLSI design including an introduction to IC technologies like MOS, PMOS, NMOS, and CMOS. It will analyze basic electrical properties of MOS circuits and CMOS inverter design. Students will learn about CMOS circuit and logic design rules, scaling, characterization, performance estimation, and fault models for testing. The course will use textbooks on essentials of VLSI circuits and systems, CMOS VLSI design, digital integrated circuits, and modern VLSI design.

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Mahendra V Mahi
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0% found this document useful (0 votes)
633 views1 page

CMOS VLSI Design

This syllabus covers CMOS VLSI design including an introduction to IC technologies like MOS, PMOS, NMOS, and CMOS. It will analyze basic electrical properties of MOS circuits and CMOS inverter design. Students will learn about CMOS circuit and logic design rules, scaling, characterization, performance estimation, and fault models for testing. The course will use textbooks on essentials of VLSI circuits and systems, CMOS VLSI design, digital integrated circuits, and modern VLSI design.

Uploaded by

Mahendra V Mahi
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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SYLLABUS CMOS VLSI Design

Technology Introduction: Introduction to IC Technology MOS, PMOS, NMOS, CMOS & Bi-CMOS Ion Technologies. VLSI Fabrication, Oxidation, Lithography, and Diffusion, Implantation, Metallization, Integrated Resistors

Capacitors.MOS Theory Analysis: Basic Electrical Properties of MOS Circuits: Ids-VdsRelationships, MOS Transistor Threshold Voltage Vth, gm, gds, Figure of Merit o, Short Channel and Narrow Channel Width Effects. Pass Transistor, Transmission Gate, NMOS Inverter, Various Pull-ups, CMOS Inverter Analysis and Design, Bi-CMOS Inverters, Latch up in CMOS Circuits. CMOS Circuits and Logic Design Rules: MOS Layers, Stick Diagrams, Design Rules and Layout, 2m, 1.2 m Design Rules, Rules for Vias and Contacts, Stick Diagrams and Simple Symbolic Encodings for NMOS, PMOS, CMOS and BiCMOS Logic Gates. Scaling of CMOS Circuits.CMOS Circuit Charactersation and Performance Estimation: Sheet Resistance RS and its Concept to MOS, Area Capacitance Units, Calculations - Delays, Driving Large Capacitive Loads, Delay Estimation, Logical Effort and Transistor Sizing, Power Dissipation, Reliability. CMOS Fault models: need for testing, manufacturing test principles. TEXT BOOKS 1. Kamran Ehraghian, Dauglas A. Pucknell and Sholeh Eshraghiam, Essentials of VLSI Circuits and Systems PHI, EEE, 2005 Edition. 2. Neil H. E. Weste and David. Harris Ayan Banerjee,, CMOS VLSI Design - Pearson Education, 1999. REFERENCES 1. Sung-Mo Kang, Yusuf Leblebici,CMOS Digital Integrated Circuits TMH 2003 2. Jan M. Rabaey, Digital Integrated Circuits Pearson Education, 2003 3. Wayne Wolf, Modern VLSI Design ", 2nd Edition, Prentice Hall,1998. SIMULATION TEXT BOOKS 1. Etienne Sicard, Sonia Delmas Bendhia, Basics of CMOS Cell Design, TMH, EEE, 2005.

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