VLSI Testing: Virendra Singh
VLSI Testing: Virendra Singh
Introduction I t d ti
Virendra Singh
Indian Institute of Science Bangalore
[email protected]
E0 286: Testing & Verification of SoC Design Lecture 1 (Jan 13, 2011)
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Acknowledgement
Prof. Hideo Fujiwara, NAIST, Japan Prof. Kewal Saluja, Univ. of Wisconsin Madison Wisconsin-Madison Prof. Vishwani Agrawal, Auburn Univ. Prof. Samiha Mourad, Santa Clara Univ. , Prof. Michiko Inoue, NAIST Prof. Erik Larsson, Linkoping Univ. Dr. Subir Roy, Texas Instruments, India Dr. Rubin Parekhji, TI, India Prof. Masahiro Fujita, Tokyo Univ., Japan Dr. Pradip Thaker, Analog Devices, Bangalore
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Definitions
Design synthesis: Given an I/O function, develop a procedure to manufacture a device using known materials and processes. Verification: Predictive analysis to ensure that the synthesized design, when manufactured, will perform the given I/O function. function Test: A manufacturing step that ensures that the physical device, manufactured from the synthesized design, has no manufacturing defect. defect
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